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TBD Datasheet(PDF) 1 Page - Integrated Circuit Systems |
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TBD Datasheet(HTML) 1 Page - Integrated Circuit Systems |
1 / 10 page 85222AM-02 www.icst.com/products/hiperclocks.html REV. A JANUARY 25, 2006 1 Integrated Circuit Systems, Inc. ICS85222-02 1-TO-2 LVCMOS / LVTTL-TO- DIFFERENTIAL HSTL TRANSLATOR PRELIMINARY GENERAL DESCRIPTION The ICS85222-02 is a 1-to-2 LVCMOS / LVTTL- to-Differential HSTL translator and a member of the HiPerClocks™family of High Performance Clock Solutions from ICS. The ICS85222-02 has one single ended clock input. The single ended clock input accepts LVCMOS or LVTTL input levels and trans- lates them to HSTL levels. The small outline 8-pin SOIC pack- age makes this device ideal for applications where space, high performance and low power are important. FEATURES • Two differential HSTL outputs • One LVCMOS/LVTTL clock input • CLK input can accept the following input levels: LVCMOS or LVTTL • Maximum output frequency: 350MHz • Part-to-part skew: TBD • Propagation delay: 1ns (typical) • V OH: 1.4V (maximum) • Full 3.3V operating supply voltage • 0°C to 70°C ambient operating temperature • Industrial temperature information available upon request • Available in both standard and lead-free RoHS compliant packages BLOCK DIAGRAM PIN ASSIGNMENT ICS85222-02 8-Lead SOIC 3.90mm x 4.92mm x 1.37mm body package M Package Top View Q0 nQ0 Q1 nQ1 1 2 3 4 Q0 nQ0 CLK HiPerClockS™ ICS VDD CLK nc GND 8 7 6 5 The Preliminary Information presented herein represents a product in prototyping or pre-production. The noted characteristics are based on initial product characterization. Integrated Circuit Systems, Incorporated (ICS) reserves the right to change any circuitry or specifications without notice. Q1 nQ1 Pullup |
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