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ICS840031AMILF Datasheet(PDF) 6 Page - Integrated Circuit Systems |
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ICS840031AMILF Datasheet(HTML) 6 Page - Integrated Circuit Systems |
6 / 9 page 840031AMI www.icst.com/products/hiperclocks.html REV. A FEBRUARY 24, 2005 6 Integrated Circuit Systems, Inc. ICS840031I FEMTOCLOCKS™CRYSTAL-TO- LVCMOS/LVTTL CLOCK GENERATOR APPLICATION INFORMATION Figure 2. CRYSTAL INPUt INTERFACE CRYSTAL INPUT INTERFACE The ICS840031I has been characterized with 18pF parallel resonant crystals. The capacitor values, C1 and C2, shown in Figure 2 below were determined using a 24.576MHz, 18pF parallel resonant crystal and were chosen to minimize the ppm error. The optimum C1 and C2 values can be slightly adjusted for different board layouts. POWER SUPPLY FILTERING TECHNIQUES As in any high speed analog circuitry, the power supply pins are vulnerable to random noise. The ICS840031I provides separate power supplies to isolate any high switching noise from the outputs to the internal PLL. V DD, VDDA, and VDDO should be individually connected to the power supply plane through vias, and bypass capacitors should be used for each pin. To achieve optimum jitter performance, power supply isolation is required. Figure 1 illustrates how a 10 Ω resistor along with a 10µF and a .01µF bypass capacitor should be connected to each V DDA pin. FIGURE 1. POWER SUPPLY FILTERING 10 Ω V DDA 10 µF .01 µF 3.3V .01 µF V DD C1 33p X1 18pF Parallel Crystal C2 22p XTAL_OUT XTAL_IN |
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