ICS8430BI-71L datasheet(9/16 Pages) ICST

Part #	ICS8430BI-71L

Description	700MHZ, LOW JITTER, CRYSTAL INTERFACE / LVCMOS-TO-3.3V LVPECL FREQUENCY SYNTHESIZER

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Manufacturer	ICST [Integrated Circuit Systems]

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9 / 16 page

8430BYI-71

www.icst.com/products/hiperclocks.html

REV. A FEBRUARY 17, 2006

9

Integrated

Circuit

Systems, Inc.

ICS8430BI-71

700MHZ, LOW JITTER, CRYSTAL INTERFACE/

LVCMOS-TO-3.3V LVPECL FREQUENCY SYNTHESIZER

PRELIMINARY

V

CC - 2V

50

Ω

50

Ω

RTT

Z

o = 50Ω

Z

o = 50Ω

FOUT

FIN

RTT =

Z

o

1

((V

OH + VOL) / (VCC – 2)) – 2

3.3V

125

Ω

125

Ω

84

Ω

84

Ω

Z

o = 50Ω

Z

o = 50Ω

FOUT

FIN

The clock layout topology shown below is a typical termina-

tion for LVPECL outputs. The two different layouts mentioned

are recommended only as guidelines.

FOUT and nFOUT are low impedance follower outputs that

generate ECL/LVPECL compatible outputs. Therefore, termi-

nating resistors (DC current path to ground) or current sources

must be used for functionality. These outputs are designed to

drive 50

Ω transmission lines. Matched impedance tech-

FIGURE 4B. LVPECL OUTPUT TERMINATION

FIGURE 4A. LVPECL OUTPUT TERMINATION

niques should be used to maximize operating frequency

and minimize signal distortion. There are a few simple ter-

mination schemes. Figures 4A and 4B show two different

layouts which are recommended only as guidelines. Other

suitable clock layouts may exist and it would be recom-

mended that the board designers simulate to guarantee

compatibility across all printed circuit and clock component

process variations.

TERMINATION FOR LVPECL OUTPUTS

INPUTS:

CRYSTAL INPUT:

For applications not requiring the use of the crystal oscillator

input, both XTAL_IN and XTAL_OUT can be left floating.

Though not required, but for additional protection, a 1k

Ω

resistor can be tied from XTAL_IN to ground.

TEST_CLK INPUT:

For applications not requiring the use of the test clock, it can

be left floating. Though not required, but for additional

protection, a 1k

Ω resistor can be tied from the TEST_CLK to

ground.

LVCMOS CONTROL PINS:

All control pins have internal pull-ups or pull-downs; additional

resistance is not required but can be added for additional

protection. A 1k

Ω resistor can be used.

RECOMMENDATIONS FOR UNUSED INPUT AND OUTPUT PINS

OUTPUTS:

LVPECL OUTPUT

All unused LVPECL outputs can be left floating. We

recommend that there is no trace attached. Both sides of the

differential output pair should either be left floating or

terminated.

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