ICS8430DY-111 datasheet(10/16 Pages) ICST

Part #	ICS8430DY-111

Description	700MHZ, LOW JITTER DIFFERENTIAL-TO-3.3V LVPECL FREQUENCY SYNTHESIZER

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Manufacturer	ICST [Integrated Circuit Systems]

Direct Link	http://www.icst.com

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10 / 16 page

8430DY-111

www.icst.com/products/hiperclocks.html

REV. F JUNE 1, 2005

10

PRELIMINARY

Integrated

Circuit

Systems, Inc.

ICS8430-111

700MHZ, LOW JITTER

DIFFERENTIAL-TO-3.3V LVPECL FREQUENCY SYNTHESIZER

Figure 4 shows how the differential input can be wired to accept

single ended levels. The reference voltage V_REF = V

CC/2 is

generated by the bias resistors R1, R2 and C1. This bias circuit

should be located as close as possible to the input pin. The ratio

FIGURE 4. SINGLE ENDED SIGNAL DRIVING DIFFERENTIAL INPUT

WIRING THE DIFFERENTIAL INPUT TO ACCEPT SINGLE ENDED LEVELS

of R1 and R2 might need to be adjusted to position the V_REF in

the center of the input voltage swing. For example, if the input

clock swing is only 2.5V and V

CC = 3.3V, V_REF should be 1.25V

and R2/R1 = 0.609.

V_REF

R1

1K

C1

0.1u

R2

1K

Single Ended Clock Input

CLK

nCLK

VCC

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