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ICS8430BY-71 Datasheet(PDF) 1 Page - Integrated Circuit Systems |
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ICS8430BY-71 Datasheet(HTML) 1 Page - Integrated Circuit Systems |
1 / 16 page 8430BY-71 www.icst.com/products/hiperclocks.html REV. A SEPTEMBER 20, 2005 1 Integrated Circuit Systems, Inc. ICS8430B-71 700MHZ, LOW JITTER, CRYSTAL INTERFACE/ LVCMOS-TO-3.3V LVPECL FREQUENCY SYNTHESIZER PRELIMINARY GENERAL DESCRIPTION The ICS8430B-71 is a general purpose, dual out- put Crystal/LVCMOS-to-3.3V Differential LVPECL High Frequency Synthesizer and a member of the HiPerClockS™ family of High Performance Clock Solutions from ICS. The ICS8430B-71 has a se- lectable crystal oscillator interface or LVCMOS TEST_CLK. The VCO operates at a frequency range of 250MHz to 700MHz. With the output configured to divide the VCO frequency by 2, output frequency steps as small as 2MHz can be achieved using a 16MHz crystal or test clock. Output frequencies up to 700MHz can be programmed using the serial or parallel interfaces to the configuration logic. The low jitter and frequency range of the ICS8430B-71 make it an ideal clock generator for most clock tree applications. BLOCK DIAGRAM PIN ASSIGNMENT FEATURES • Dual differential 3.3V LVPECL outputs • Selectable crystal oscillator interface or LVCMOS TEST_CLK • Output frequency up to 700MHz • Crystal input frequency range: 12MHz to 27MHz • VCO range: 250MHz to 700MHz • Parallel or serial interface for programming counter and output dividers • RMS period jitter: 9ps (maximum) • Cycle-to-cycle jitter: 25ps (maximum) • 3.3V supply voltage • 0°C to 70°C ambient operating temperature • Replaces 8430-71 • Available in both standard and lead-free RoHS-compliant packages 32 31 30 29 28 27 26 25 9 10 11 12 13 14 15 16 1 2 3 4 5 6 7 8 24 23 22 21 20 19 18 17 XTAL_OUT TEST_CLK XTAL_SEL VCCA S_LOAD S_DATA S_CLOCK MR M5 M6 M7 M8 N0 N1 N2 VEE 32-Lead LQFP 7mm x 7mm x 1.4mm package body Y Package Top View ICS8430B-71 HiPerClockS™ ICS OSC VCO_SEL XTAL_SEL TEST_CLK XTAL_IN XTAL_OUT S_LOAD S_DATA S_CLOCK nP_LOAD M0:M8 N0:N2 VCO PLL FOUT0 nFOUT0 FOUT1 nFOUT1 TEST ÷ N CONFIGURATION INTERFACE LOGIC ÷ M 0 1 0 1 ÷ 16 PHASE DETECTOR MR ÷ 2 The Preliminary Information presented herein represents a product in prototyping or pre-production. The noted characteristics are based on initial product characterization. Integrated Circuit Systems, Incorporated (ICS) reserves the right to change any circuitry or specifications without notice. |
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