Electronic Components Datasheet Search
  English  ▼
ALLDATASHEET.COM

X  

ICS8430-71B Datasheet(PDF) 2 Page - Integrated Circuit Systems

Part # ICS8430-71B
Description  700MHZ, LOW JITTER, CRYSTAL INTERFACE / LVCMOS-TO-3.3V LVPECL FREQUENCY SYNTHESIZER
Download  16 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  ICST [Integrated Circuit Systems]
Direct Link  http://www.icst.com
Logo ICST - Integrated Circuit Systems

ICS8430-71B Datasheet(HTML) 2 Page - Integrated Circuit Systems

  ICS8430-71B Datasheet HTML 1Page - Integrated Circuit Systems ICS8430-71B Datasheet HTML 2Page - Integrated Circuit Systems ICS8430-71B Datasheet HTML 3Page - Integrated Circuit Systems ICS8430-71B Datasheet HTML 4Page - Integrated Circuit Systems ICS8430-71B Datasheet HTML 5Page - Integrated Circuit Systems ICS8430-71B Datasheet HTML 6Page - Integrated Circuit Systems ICS8430-71B Datasheet HTML 7Page - Integrated Circuit Systems ICS8430-71B Datasheet HTML 8Page - Integrated Circuit Systems ICS8430-71B Datasheet HTML 9Page - Integrated Circuit Systems Next Button
Zoom Inzoom in Zoom Outzoom out
 2 / 16 page
background image
8430BY-71
www.icst.com/products/hiperclocks.html
REV. A SEPTEMBER 20, 2005
2
Integrated
Circuit
Systems, Inc.
ICS8430B-71
700MHZ, LOW JITTER, CRYSTAL INTERFACE/
LVCMOS-TO-3.3V LVPECL FREQUENCY SYNTHESIZER
PRELIMINARY
specific default state that will automatically occur during
power-up. The TEST output is LOW when operating in the
parallel input mode. The relationship between the VCO fre-
quency, the crystal frequency and the M divider is defined as
follows:
The M value and the required values of M0 through M8 are
shown in Table 3B, Programmable VCO Frequency Function
Table. Valid M values for which the PLL will achieve lock for a
16MHz reference are defined as 125
≤ M ≤ 350.The frequency
out is defined as follows:
Serial operation occurs when nP_LOAD is HIGH and S_LOAD
is LOW. The shift register is loaded by sampling the S_DATA
bits with the rising edge of S_CLOCK. The contents of the
shift register are loaded into the M divider and N output di-
vider when S_LOAD transitions from LOW-to-HIGH. The M
divide and N output divide values are latched on the HIGH-
to-LOW transition of S_LOAD. If S_LOAD is held HIGH, data
at the S_DATA input is passed directly to the M divider and N
output divider on each rising edge of S_CLOCK. The serial
mode can be used to program the M and N bits and test bits
T1 and T0. The internal registers T0 and T1 determine the state
of the TEST output as follows:
NOTE: The functional description that follows describes op-
eration using a 16MHz crystal. Valid PLL loop divider values
for different crystal or input frequencies are defined in the In-
put Frequency Characteristics, Table 5, NOTE 1.
The ICS8430B-71 features a fully integrated PLL and there-
fore requires no external components for setting the loop band-
width. A parallel-resonant, fundamental crystal is used as the
input to the on-chip oscillator. The output of the oscillator is
divided by 16 prior to the phase detector. With a 16MHz crys-
tal, this provides a 1MHz reference frequency. The VCO of
the PLL operates over a range of 250MHz to 700MHz. The
output of the M divider is also applied to the phase detector.
The phase detector and the M divider force the VCO output
frequency to be 2M times the reference frequency by adjust-
ing the VCO control voltage. Note that for some values of M
(either too high or too low), the PLL will not achieve lock. The
output of the VCO is scaled by a divider prior to being sent to
each of the LVPECL output buffers. The divider provides a
50% output duty cycle.
The programmable features of the ICS8430B-71 support two
input modes to program the M divider and N output divider.
The two input operational modes are parallel and serial. Fig-
ure 1 shows the timing diagram for each mode. In parallel
mode, the nP_LOAD input is initially LOW. The data on inputs
M0 through M8 and N0 through N2 is passed directly to the M
divider and N output divider. On the LOW-to-HIGH transition
of the nP_LOAD input, the data is latched and the M divider
remains loaded until the next LOW transition on nP_LOAD or
until a serial event occurs. As a result, the M and N bits can
be hardwired to set the M divider and N output divider to a
FUNCTIONAL DESCRIPTION
N
fout = fVCO =
16
2M
fxtal x
N
16
fVCO =
fxtal x 2M
T1
T0
TEST Output
0
0
LOW
0
1
S_Data clocked into register
1
0
Output of M divider
1
1
CMOS Fout
FIGURE 1. PARALLEL & SERIAL LOAD OPERATIONS
Time
SERIAL LOADING
PARALLEL LOADING
t
S
t
H
t
S
t
H
t
S
M, N
T1
T0
N2
N1
N0
M8
M7
M6
M5
M4
M3
M2
M1
M0
S_CLOCK
S_DATA
S_LOAD
nP_LOAD
M0:M8, N0:N2
nP_LOAD
S_LOAD


Similar Part No. - ICS8430-71B

ManufacturerPart #DatasheetDescription
logo
Integrated Circuit Syst...
ICS8430-111 ICST-ICS8430-111 Datasheet
183Kb / 16P
   700MHZ, LOW JITTER DIFFERENTIAL-TO-3.3V LVPECL FREQUENCY SYNTHESIZER
ICS8430-51 ICST-ICS8430-51 Datasheet
151Kb / 16P
   600MHZ, LOW JITTER LVCMOS/ LVTTL-TO-3.3V LVPECL FREQUENCY SYNTHESIZER
ICS8430-61 ICST-ICS8430-61 Datasheet
175Kb / 15P
   500MHZ, CRYSTAL-TO-3.3V DIFFERENTIAL LVPECL FREQUENCY SYNTHESIZER
logo
Integrated Device Techn...
ICS8430-62 IDT-ICS8430-62 Datasheet
832Kb / 23P
   500MHz, Crystal-to-3.3V, 2.5V Differential LVPECL Frequency Synthesizer
More results

Similar Description - ICS8430-71B

ManufacturerPart #DatasheetDescription
logo
Integrated Circuit Syst...
ICS8430I-71B ICST-ICS8430I-71B Datasheet
169Kb / 16P
   700MHZ, LOW JITTER, CRYSTAL INTERFACE / LVCMOS-TO-3.3V LVPECL FREQUENCY SYNTHESIZER
logo
Renesas Technology Corp
8430B-71 RENESAS-8430B-71 Datasheet
429Kb / 20P
   700MHZ, Low Jitter, Crystal Interface LVCMOS-to-3.3V LVPECL Frequency Synthesizer
November 30, 2015
84329B RENESAS-84329B Datasheet
616Kb / 19P
   700MHZ, Low Jitter, Crystal-to-3.3V LVPECL Frequency Synthesizer
07/29/14
84330-01 RENESAS-84330-01 Datasheet
503Kb / 20P
   700MHz, Low Jitter, Crystal-To-3.3V LVPECL Frequency Synthesizer
5/26/16
logo
Integrated Device Techn...
ICS84329-01 IDT-ICS84329-01 Datasheet
338Kb / 20P
   700MHZ, LOW JITTER, CRYSTAL-TO-3.3V DIFFERENTIAL LVPECL FREQUENCY SYNTHESIZER
logo
Integrated Circuit Syst...
ICS84329B ICST-ICS84329B Datasheet
237Kb / 19P
   700MHZ, LOW JITTER, CRYSTAL-TO-3.3V DIFFERENTIAL LVPECL FREQUENCY SYNTHESIZER
logo
Renesas Technology Corp
84329-01 RENESAS-84329-01 Datasheet
836Kb / 21P
   700MHZ, LOW JITTER, CRYSTAL-TO-3.3V DIFFERENTIAL LVPECL FREQUENCY SYNTHESIZER
APRIL 9, 2014
logo
Integrated Circuit Syst...
ICS84329 ICST-ICS84329 Datasheet
279Kb / 19P
   700MHZ, LOW JITTER, CRYSTAL-TO-3.3V DIFFERENTIAL LVPECL FREQUENCY SYNTHESIZER
ICS84329-01B ICST-ICS84329-01B Datasheet
270Kb / 19P
   700MHZ, LOW JITTER, CRYSTAL-TO-3.3V DIFFERENTIAL LVPECL FREQUENCY SYNTHESIZER
ICS84330-02 ICST-ICS84330-02 Datasheet
226Kb / 17P
   700MHZ, LOW JITTER, CRYSTAL-TO-3.3V DIFFERENTIAL LVPECL FREQUENCY SYNTHESIZER
More results


Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16


Datasheet Download

Go To PDF Page


Link URL




Privacy Policy
ALLDATASHEET.COM
Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Datasheet Upload   |   Contact us   |   Privacy Policy   |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com