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WF5025MLB Datasheet(PDF) 10 Page - Nippon Precision Circuits Inc |
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WF5025MLB Datasheet(HTML) 10 Page - Nippon Precision Circuits Inc |
10 / 16 page WF5025 series NIPPON PRECISION CIRCUITS INC.—10 Switching Characteristics WF5025AL × (2.5V operation) VDD = 2.25 to 2.75V, VSS = 0V, Ta = −40 to +85°C unless otherwise noted. WF5025AL × (3.0V operation) VDD = 2.7 to 3.6V, VSS = 0V, Ta = −40 to +85°C unless otherwise noted. Parameter Symbol Condition Rating Unit min typ max Output rise time tr1 Measurement cct 3, load cct 1, 0.1VDD to 0.9VDD CL = 15pF – 3 6 ns tr2 CL = 30pF – 5 10 ns Output fall time tf1 Measurement cct 3, load cct 1, 0.9VDD to 0.1VDD CL = 15pF – 3 6 ns tf2 CL = 30pF – 5 10 ns Output duty cycle*1 *1. The duty cycle characteristic is checked the sample chips of each production lot. Duty1 Measurement cct 3, load cct 1, VDD = 2.5V, Ta = 25°C, f = 50MHz CL = 15pF 45 – 55 % Duty2 CL = 30pF 45 – 55 % Output disable delay time*2 *2. Oscillator stop function is built-in. When INHN goes LOW, normal output stops. When INHN goes HIGH, normal output is not resumed until after the oscillator start-up time has elapsed. tPLZ Measurement cct 6, load cct 1, VDD = 2.5V, Ta = 25°C, CL = 15pF – – 100 ns Output enable delay time*2 tPZL – – 100 ns Parameter Symbol Condition Rating Unit min typ max Output rise time tr1 Measurement cct 3, load cct 1, 0.1VDD to 0.9VDD CL = 15pF – 2.5 5 ns tr2 CL = 30pF – 4.5 9 ns Output fall time tf1 Measurement cct 3, load cct 1, 0.9VDD to 0.1VDD CL = 15pF – 2.5 5 ns tf2 CL = 30pF – 4.5 9 ns Output duty cycle*1 *1. The duty cycle characteristic is checked the sample chips of each production lot. Duty1 Measurement cct 3, load cct 1, VDD = 3.0V, Ta = 25°C, f = 50MHz CL = 15pF 45 – 55 % Duty2 CL = 30pF 45 – 55 % Output disable delay time*2 *2. Oscillator stop function is built-in. When INHN goes LOW, normal output stops. When INHN goes HIGH, normal output is not resumed until after the oscillator start-up time has elapsed. tPLZ Measurement cct 6, load cct 1, VDD = 3.0V, Ta = 25°C, CL = 15pF – – 100 ns Output enable delay time*2 tPZL – – 100 ns |
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