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LM2734ZMK Datasheet(PDF) 7 Page - National Semiconductor (TI) |
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LM2734ZMK Datasheet(HTML) 7 Page - National Semiconductor (TI) |
7 / 9 page Application Information (Continued) ENABLE PIN / SHUTDOWN MODE The LM2734Z has a shutdown mode that is controlled by the enable pin (EN). When a logic low voltage is applied to EN, the part is in shutdown mode and its quiescent current drops to typically 30nA. Switch leakage adds another 40nA from the input supply. The voltage at this pin should never exceed V IN + 0.3V. SOFT-START This function forces V OUT to increase at a controlled rate during start up. During soft-start, the error amplifier’s refer- ence voltage ramps from 0V to its nominal value of 0.8V in approximately 200µs. This forces the regulator output to ramp up in a more linear and controlled fashion, which helps reduce inrush current. OUTPUT OVERVOLTAGE PROTECTION The overvoltage comparator compares the FB pin voltage to a voltage that is 10% higher than the internal reference Vref. Once the FB pin voltage goes 10% above the internal refer- ence, the internal NMOS control switch is turned off, which allows the output voltage to decrease toward regulation. UNDERVOLTAGE LOCKOUT Undervoltage lockout (UVLO) prevents the LM2734Z from operating until the input voltage exceeds 2.74V(typ). The UVLO threshold has approximately 440mV of hyster- esis, so the part will operate until V IN drops below 2.3V(typ). Hysteresis prevents the part from turning off during power up if V IN is non-monotonic. CURRENT LIMIT The LM2734Z uses cycle-by-cycle current limiting to protect the output switch. During each switching cycle, a current limit comparator detects if the output switch current exceeds 1.7A (typ), and turns off the switch until the next switching cycle begins. THERMAL SHUTDOWN Thermal shutdown limits total power dissipation by turning off the output switch when the IC junction temperature ex- ceeds 165˚C. After thermal shutdown occurs, the output switch doesn’t turn on until the junction temperature drops to approximately 150˚C. Design Guide INDUCTOR SELECTION The Duty Cycle (D) can be approximated quickly using the ratio of output voltage (V O) to input voltage (VIN): The catch diode (D1) forward voltage drop and the voltage drop across the internal NMOS must be included to calculate a more accurate duty cycle. Calculate D by using the follow- ing formula: V SW can be approximated by: V SW =IO xRDS(ON) The diode forward drop (V D) can range from 0.3V to 0.7V depending on the quality of the diode. The lower V D is, the higher the operating efficiency of the converter. The inductor value determines the output ripple current. Lower inductor values decrease the size of the inductor, but increase the output ripple current. An increase in the inductor value will decrease the output ripple current. The ratio of ripple current ( ∆i L) to output current (IO) is optimized when it is set between 0.3 and 0.4 at 1A. The ratio r is defined as: One must also ensure that the minimum current limit (1.2A) is not exceeded, so the peak current in the inductor must be calculated. The peak current (I LPK) in the inductor is calcu- lated by: I LPK =IO + ∆I L/2 If r = 0.5 at an output of 1A, the peak current in the inductor will be 1.25A. The minimum guaranteed current limit over all operating conditions is 1.2A. One can either reduce r to 0.4 resulting in a 1.2A peak current, or make the engineering judgement that 50mA over will be safe enough with a 1.7A typical current limit and 6 sigma limits. When the designed maximum output current is reduced, the ratio r can be in- creased. At a current of 0.1A, r can be made as high as 0.9. The ripple ratio can be increased at lighter loads because the net ripple is actually quite low, and if r remains constant the inductor value can be made quite large. An equation empirically developed for the maximum ripple ratio at any current below 2A is: r = 0.387 x I OUT -0.3667 Note that this is just a guideline. 20130348 FIGURE 5. Boost Voltage Supplied from the Shunt Zener on V IN www.national.com 7 |
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