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PLL502-01OM Datasheet(PDF) 2 Page - PhaseLink Corporation |
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PLL502-01OM Datasheet(HTML) 2 Page - PhaseLink Corporation |
2 / 5 page Preliminary for proposal PLL502-01 Low Phase Noise VCXO (24MHz to 50MHz) 47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991 Rev 4/01/02 Page 2 PIN DESCRIPTIONS Name Number Type Description XOUT 1 I Crystal output pin. N/C 2 - Not connected. VIN 3 I Frequency control voltage input pin. GND 4 P Ground pin. CLK 5 O Output clock pin. VDD 6 P +3.3V VDD power supply pin. OE 7 I Output enable input pin. Disables (tri-state) output when low. Internal pull- up enables output by default if pin is not connected to low. XIN 8 I Crystal input pin. ELECTRICAL SPECIFICATIONS 1. Absolute Maximum Ratings PARAMETERS SYMBOL MIN. MAX. UNITS Supply Voltage Range VCC -0.5 7 V Input Voltage Range VI -0.5 VCC +0.5 V Output Voltage Range VO -0.5 VCC +0.5 V Soldering Temperature 260 °C Storage Temperature TS -65 150 °C Ambient Operating Temperature* -40 85 °C Exposure of the device under conditions beyond the limits specified by Maximum Ratings for extended periods may cause permanent damage to the device and affect product reliability. These conditions represent a stress rating only, and functional operations of the device at these or any other conditions above the operational limits noted in this specification is not implied. * Note: Operating Temperature is guaranteed by design for all parts (COMMERCIAL and INDUSTRIAL), but tested for INDUSTRIAL grade only. |
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