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P500-X7BDC Datasheet(PDF) 2 Page - PhaseLink Corporation |
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P500-X7BDC Datasheet(HTML) 2 Page - PhaseLink Corporation |
2 / 5 page PLL500-17B/27B/37B Low Power CMOS Output VCXO Family (17MHz to 130MHz) 47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 12/21/05 Page 2 PIN AND PAD DESCRIPTION Die Pad Position Name Pin# X ( µm) Y ( µm) Type Description XIN 1 94.183 768.599 I Crystal input pin. OE 2 94.157 605.029 I Output Enable input pin. Disables the output when low. Internal pull-up enables output by default if pin is not connected low. VCON 3 94.183 331.756 I Frequency control voltage input pin. GND 4 94.193 140.379 P Ground pin. CLK 5 715.472 203.866 O Output clock pin. VDD 6 715.307 455.726 P VDD power supply pin. DRIVSEL 7 715.472 626.716 I Output drive select pin. High drive if set to ‘0’. Low drive if set to ‘1’. Internal pull-up. XOUT 8 476.906 888.881 I Crystal output pin. Ref clock input. ELECTRICAL SPECIFICATIONS 1. Absolute Maximum Ratings PARAMETERS SYMBOL MIN. MAX. UNITS Supply Voltage VDD 4.6 V Input Voltage, dc VI -0.5 VDD+0.5 V Output Voltage, dc VO -0.5 VDD+0.5 V Storage Temperature TS -65 150 °C Ambient Operating Temperature* TA -40 85 °C Junction Temperature TJ 125 °C Lead Temperature (soldering, 10s) 260 °C ESD Protection, Human Body Model 2 kV Exposure of the device under conditions beyond the limits specified by Maximum Ratings for extended periods may cause permanent damage to the device and affect product reliability. These conditions represent a stress rating only, and functional operations of the device at these or any other conditions above the operational limits noted in this specification is not implied. * Note: Operating Temperature is guaranteed by design for all parts (COMMERCIAL and INDUSTRIAL), but tested for COMMERCIAL grade only. 2. AC Electrical Specifications PARAMETERS SYMBOL CONDITIONS MIN. TYP. MAX. UNITS PLL500-17B 17 36 PLL500-27B 27 65 Input Crystal Frequency PLL500-47B 65 130 MHz 0.8V ~ 2.0V with 10 pF load 0.8 Output Clock Rise/Fall Time 0.3V ~ 3.0V with 15 pF load 2.5 ns Output Clock Duty Cycle Measured @ 1.4V 45 50 55 % Short Circuit Current ±50 mA |
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