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P130-68 Datasheet(PDF) 2 Page - PhaseLink Corporation |
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P130-68 Datasheet(HTML) 2 Page - PhaseLink Corporation |
2 / 5 page PLL130-68/-69 High Speed Translator Buffers: Single ended to PECL or LVDS 47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 11/29/04 Page 2 PIN DESCRIPTION Name Pin number Type Description NC 1, 3, 4, 6, 8, 12, 14 - No connection. REFIN 2 I Reference input signal. The frequency of this signal will be reproduced at the output (after translation to PECL or LVDS level). OECTRL 5 I Output enable input (See OE Logic Table on page 1). GND 7 P Ground connector. OESEL 9 I Output enable logic selector (See OE Logic Table on page 1). Q_BAR 10 O Complementary output. PECL_bar on PLL130-68, LVDS_bar on PLL130-69. Q 11 O True output. PECL on PLL130-68, LVDS on PLL130-69. VDD 13 P 3.3V Power supply. Q 15 O Additional true output. PECL on PLL130-68, LVDS on PLL130-69. This output is the same as pin 11. Q_BAR 16 O Additional complementary output. PECL_bar on PLL130-68, LVDS_bar on PLL130-69. This output is the same as pin 10. ELECTRICAL SPECIFICATIONS 1. Absolute Maximum Ratings PARAMETERS SYMBOL MIN. MAX. UNITS Supply Voltage VDD 4.6 V Input Voltage, dc VI -0.5 VDD+0.5 V Output Voltage, dc VO -0.5 VDD+0.5 V Storage Temperature TS -65 150 °C Ambient Operating Temperature* TA -40 85 °C Junction Temperature TJ 125 °C Lead Temperature (soldering, 10s) 260 °C ESD Protection, Human Body Model 2 kV Exposure of the device under conditions beyond the limits specified by Maximum Ratings for extended periods may cause permanent damage to the device and affect product reliability. These conditions represent a stress rating only, and functional operations of the device at these or any other con- ditions above the operational limits noted in this specification is not implied. * Note: Operating Temperature is guaranteed by design for all parts (COMMERCIAL and INDUSTRIAL), but tested for COMMERCIAL grade only. 2. General Electrical Specifications PARAMETERS SYMBOL CONDITIONS MIN. TYP. MAX. UNITS Fout = 156.25MHz, PECL 45 48 51 Supply Current (both outputs loaded) IDD Fout = 156.25MHz, LVDS 22 25 28 mA Operating Voltage VDD 2.97 3.63 V @ Vdd – 1.3V (PECL) Same as input Output Clock Duty Cycle @ 1.25V (LVDS) Same as input % Short Circuit Current ±50 mA |
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