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PLL620-2XXCR Datasheet(PDF) 3 Page - PhaseLink Corporation |
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PLL620-2XXCR Datasheet(HTML) 3 Page - PhaseLink Corporation |
3 / 6 page PLL620-28/-29 Low Phase Noise VCXO (for 100-200MHz Fund Xtal) 47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 07/08/05 Page 3 3. General Electrical Specifications PARAMETERS SYMBOL CONDITIONS MIN. TYP. MAX. UNITS Supply Current (Loaded Outputs) IDD PECL/LVDS 100/80 mA Operating Voltage VDD 2.97 3.63 V Output Clock Duty Cycle @ 1.25V (LVDS) @ VDD – 1.3V (PECL) 45 45 50 50 55 55 % Short Circuit Current ±50 mA 4. Jitter Specifications PARAMETERS CONDITIONS MIN. TYP. MAX. UNITS Period jitter RMS 2.5 Period jitter peak-to-peak At 155.52MHz, with capacitive decoupling between VDD and GND. 18.5 ps Accumulated jitter RMS 2.5 Accumulated jitter peak-to-peak At 155.52MHz, with capacitive decoupling between VDD and GND. Over 10,000 cycles. 24 ps Integrated jitter RMS at 155MHz Integrated 12 kHz to 20 MHz 0.3 ps 5. Phase Noise Specifications PARAMETERS FREQUENCY @10Hz @100Hz @1kHz @10kHz @100kHz UNITS Phase Noise relative to carrier 155.52MHz -80 -110 -125 -143 -145 dBc/Hz |
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