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PLL103-11SI Datasheet(PDF) 5 Page - PhaseLink Corporation |
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PLL103-11SI Datasheet(HTML) 5 Page - PhaseLink Corporation |
5 / 7 page PLL103-11 Low Skew Buffers 47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991 Rev 11/07/00 Page 5 ELECTRICAL SPECIFICATIONS 1. Absolute Maximum Ratings PARAMETERS SYMBOL MIN. MAX. UNITS Supply Voltage VDD VSS -0.5 7.0 V Input Voltage, dc VI VSS -0.5 VDD +0.5 V Output Voltage, dc VO VSS -0.5 VDD +0.5 V Storage Temperature TS -65 150 °C Ambient Operating Temperature TA 0 70 °C Exposure of the device under conditions beyond the limits specified by Maximum Ratings for extended periods may cause permanent damage to the device and affect product reliability. These conditions represent a stress rating only, and functional operations of the device at these or any other conditions above the operational limits noted in this specification is not implied. 2. AC/DC Electrical Specifications PARAMETERS SYMBOL CONDITIONS MIN. TYP. MAX. UNITS Input High Current IIH VIN = VDD 5 uA IIL VIN=0V; with no pull-up resistors uA Input Low Current IIL VIN=0V; with 100k pull-up resistors uA Input High Voltage VIH 2 VDD +0.3 V Input Low Voltage VIL VSS −0.3 0.8 V Input Frequency FIN VDD=3.3V; All outputs loaded 10 150 MHz Input Capacitance CIN Logic Inputs 5 pF IDD1 CL= 0pf @ 66MHz 80 120 mA IDD2 CL= 0pf @ 100MHz 120 180 mA IDD3 CL= 30pf; RS= 33 Ω @ 66MHz 180 260 mA IDD4 CL= 30pf; RS= 33 Ω @ 100MHz 240 360 mA Operating Supply Current IDD5 Stopped, input at 0 or VDD 500 uA |
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