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AS4C14400-70JC Datasheet(PDF) 2 Page - Alliance Semiconductor Corporation |
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AS4C14400-70JC Datasheet(HTML) 2 Page - Alliance Semiconductor Corporation |
2 / 16 page ® AS4C14400 2 Functional description The AS4C14400 is a high performance CMOS Dynamic Random Access Memory organized as 1,048,576 words × 4 bits. The AS4C14400 is fabricated with advanced CMOS technology and designed with innovative design techniques resulting in high speed, extremely low power and wide operating margins at component and system levels. The AS4C14400 features a high speed page mode operation in which high speed read, write and read-write are performed on any of the 1024 × 4 bits defined by the column address. The asynchronous column address uses an extremely short row address capture time to ease the system level timing constraints associated with multiplexed addressing. Output is tri-stated by a column address strobe (CAS) which acts as an output enable independent of RAS. Very fast CAS to output access time eases system design. Refresh on the 1024 address combinations of A0 to A9 during a 16 ms period is accomplished by performing any of the following: •RAS-only refresh cycles • Hidden refresh cycles •CAS-before-RAS refresh cycles • Normal read or write cycles The AS4C14400 is available in JEDEC standard 20/26-pin plastic SOJ and 20/26-pin plastic TSOP packages. System level features include single power supply of 5.0 ± 0.5V tolerance and direct interface with TTL logic families. Logic block diagram Recommended operating conditions Recommended operating conditions apply to all specifications unless otherwise noted. Parameter Symbol Minimum Nominal Maximum Unit Supply voltage VCC 4.5 5.0 5.5 V GND 0.0 0.0 0.0 V Input voltage VIH 2.4 – VCC + 1 V VIL –1.0 – 0.8 V Operating temperature TA 0 70 °C 1024 × 1024 × 4 Array (4,194,304) Sense amp A0 A1 A2 A3 A4 A5 A6 A7 I/O0 I/O3 Vcc GND A8 I/O2 I/O1 Column decoder Data I/O OE RAS CAS WE A9 RAS clock generator CAS clock generator WE clock generator |
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Similar Description - AS4C14400-70JC |
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