AS7C33256PFS16A-166TQC datasheet(6/11 Pages) ALSC

Part #	AS7C33256PFS16A-166TQC

Description	3.3V 256K 횞 16/18 pipeline burst synchronous SRAM

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Manufacturer	ALSC [Alliance Semiconductor Corporation]

Direct Link	https://www.alliancememory.com

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6 / 11 page

AS7C33256PFS16A

AS7C33256PFS18A

®

3/14/01; V.1.0

Alliance Semiconductor

P. 6 of 11

*“Notes” column refers to “notes” on page 10.

Key to switching waveforms

Clock access time (flow-through

mode)

tCDF

–

9

–10–10

–12

ns

Output enable LOW to data valid

tOE

–

3.5

–

3.8

–

4.0

–

5.0

ns

Clock HIGH to output Low Z

tLZC

0

–

0–

0–0

–

ns

2,3,4

Data output invalid from clock HIGH

tOH

1.5

–

1.5

–

1.5

–

1.5

–

ns

2

Output enable LOW to output Low Z

tLZOE

0

–

0–

0–0

–

ns

2,3,4

Output enable HIGH to output High Z

tHZOE

–

3.5

–

3.8

–

4.0

–

4.5

ns

2,3,4

Clock HIGH to output High Z

tHZC

–

3.5

–

3.8

–

4.0

–

5.0

ns

2,3,4

Output enable HIGH to invalid output

tOHOE

0

–

0–

0–0

–

ns

Clock HIGH pulse width

tCH

2.4

–

2.5

–

2.5

–

3.5

–

ns

5

Clock LOW pulse width

tCL

2.4

–

2.5

–

2.5

–

3.5

–

ns

5

Address setup to clock HIGH

tAS

1.5

–

1.5

–

1.5

–

2.0

–

ns

6

Data setup to clock HIGH

tDS

1.5

–

1.5

–

1.5

–

2.0

–

ns

6

Write setup to clock HIGH

tWS

1.5

–

1.5

–

1.5

–

2.0

–

ns

6,7

Chip select setup to clock HIGH

tCSS

1.5

–

1.5

–

1.5

–

2.0

–

ns

6,8

Address hold from clock HIGH

tAH

0.5

–

0.5

–

0.5

–

0.5

–

ns

6

Data hold from clock HIGH

tDH

0.5

–

0.5

–

0.5

–

0.5

–

ns

6

Write hold from clock HIGH

tWH

0.5

–

0.5

–

0.5

–

0.5

–

ns

6,7

Chip select hold from clock HIGH

tCSH

0.5

–

0.5

–

0.5

–

0.5

–

ns

6,8

ADV setup to clock HIGH

tADVS

1.5

–

1.5

–

1.5

–

2.0

–

ns

6

ADSP setup to clock HIGH

tADSPS

1.5

–

1.5

–

1.5

–

2.0

–

ns

6

ADSC setup to clock HIGH

tADSCS

1.5

–

1.5

–

1.5

–

2.0

–

ns

6

ADV hold from clock HIGH

tADVH

0.5

–

0.5

–

0.5

–

0.5

–

ns

6

ADSP hold fromclock HIGH

tADSPH

0.5

–

0.5

–

0.5

–

0.5

–

ns

6

ADSC hold from clock HIGH

tADSCH

0.5

–

0.5

–

0.5

–

0.5

–

ns

6

Parameter

Symbol

–166

–150

–133

–100

Unit

Notes*

MinMax

Undefined/don’t care

Falling input

Rising input

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AS7C33256PFS16A-166TQC Datasheet(PDF) 6 Page - Alliance Semiconductor Corporation

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