TELEFUNKEN Semiconductors

U4240B

Rev. A1: 12.07.1995

2 (8)

Pin Description

18

10

1

2

3

4

5

6

7

8

9

11

12

13

14

15

16

17

U4240B

93 7721 e

DIP 18

DIP 20

Function

1

1

Mixer output

2

2

Standby switch

3

4

IF amplifier input

4

5

5

6

Low pass filtering

6

7

AF output

7, 8

8, 9

AGC time constant

9

10

Low pass filtered AF output

10

11

IF output

11

12

Field strength indicator

12

13

Oscillator output

13

14

Oscillator tank reference output

14

15

Oscillator tank input

15

16

16, 17

17, 19

RF input

18

20

GND

3, 18

Not connected

Controlled RF Preamplifier, Pin 7

The RF preamplifier is built up differentially in order to

achieve the best possible large signal handling capability.

Special care was taken to reduce the input stage noise.

Balanced Mixer, Pin 1

The mixer is a double balanced type with a single ended

output.

Controlled Oscillator, Pins 13 and 14

The oscillator employs temperature compensation,

simple varicap and coil connection. The amplitude of the

oscillator is controlled to low values, in order to support

AM varactor diodes. The LO-buffer supports the

U428xBM PLL-family.

Controlled IF Amplifier, Pin 3

The IF amplifier consists of two controlled gain cells

coupled by capacitive means. Internal band pass filtering

reduces higher order products and THD.

AM-IF Output, Pin 10

For AM stereo application and for stop signal generation

by IF counting Pin 10 provides a non limited but ampli-

tude controlled IF signal of about 280 mV.

Balanced Full-Wave Detector, Pin 5

The detector consists of a Gilbert cell that multiplies the

limited carrier signal with the IF output signal and there-

fore employs a full wave rectification. Second or higher

order products at the output are internally low pass

filtered.

AF Amplifier, Pin 6

The AF amplifier has two different outputs. They provide

different output resistances for simplifying applications.

For a high end application Pin 6 provides a 3.5 k

W output

resistor to support a second order low pass filter. Pin 9

provides additional 12 k

W for a simple first order low pass

filter.

AGC, Pin 8

The AGC block generates the AGC voltage that is to be

smoothed at Pin 8. The capacitor at Pin 8 defines the time

constant. The voltage at Pin 8 is buffered to control the

internal gain stages with different delay. The control volt-

age is available at Pin 11 (field strength indication).

Standby Switch, Pin 2

The whole circuit can be powered down by the standby

switch. This mode can be achieved by a dc voltage higher

than 3.5 V at Pin 2.