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T6K145NS Datasheet(PDF) 9 Page - Toshiba Semiconductor |
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T6K145NS Datasheet(HTML) 9 Page - Toshiba Semiconductor |
9 / 45 page T6K14 2002-01-16 9 Pin Function (1) Pin Name I/O Function SEG1 to SEG128 Output LCD drive column (segment) signals COM1 to COM64 Output LCD drive row (common) signals ICON Output LCD drive row (common) signals for icon DB0 to DB7 I/O Data bus /CS1 Input Input for chip select signal Data write: Data write enable at the rising edge of /CS1. Data read : Data read out while /CS1 is in Low level. CS2 Input Input for chip select signal Data write: Data write enable at the falling edge of CS2. Data read : Data read out while CS2 is in High level. D/I Input Input for Data/Instruction select signal ● D/I = H → Indicates that the data on DB0 to DB7 or SI is the display data. ● D/I = L → Indicates that the data on DB0 to DB7 or SI is the instruction data. /WR Input Input for write enable signal ● /WR = L → State of select /RD Input Input for read enable signal ● /RD = L → State of select RS Input Input for register/mode select signal P/S Input Input for parallel interface/serial interface select signal ● P/S = H → Parallel interface is selected. SI and SCK must be connected to VDD or VSS. ● P/S = L → Serial interface is selected. DB0 to DB7, /WR and/RD must connected to VDD or VSS. 68/80 Input Input for 68 series MPU/80 series MPU select signal ● 68/80 = H → 68 series MPU selected ● 68/80 = L → 80 series MPU selected SO Output Output for serial data SI Input Input for serial data SCK Input Input for serial clock /RST Input Input for reset signal ● /RST = L → State of select |
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