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GS84118B-166I Datasheet(PDF) 8 Page - GSI Technology |
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GS84118B-166I Datasheet(HTML) 8 Page - GSI Technology |
8 / 30 page Rev: 1.05 7/2001 8/30 © 1999, Giga Semiconductor, Inc. Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. GS84118T/B-166/150/130/100 Synchronous Truth Table Notes: 1. X means “don’t care,” H means “logic high,” L means “logic low.” 2. Write is the logic function of GW, BWE, BW1, BW2. See Byte Write Function table for detail. 3. All inputs, except OE, must meet setup and hold on rising edge of CLK. 4. Suspending busrt generates a wait cycle. 5. ADSP LOW along with SRAM being selected always initiates a Read cycle at the L-H edge of the clock (CLK). 6. A Write cycle can only be performed by setting Write low for the clock L-H edge of the subsequent wait cycle. Refer to page 12 for the Write timing diagram. Operation Address Used CE1 CE2 CE3 ADSP ADSC ADV Write OE CLK DQ Deselect Cycle, Power Down none H X X X L X X X L-H High-Z Deselect Cycle, Power Down none L L X L X X X X L-H High-Z Deselect Cycle, Power Down none L X H L X X X X L-H High-Z Deselect Cycle, Power Down none L L X H L X X X L-H High-Z Deselect Cycle, Power Down none L X H H L X X X L-H High-Z Read Cycle, Begin Burst external L H L L X X X L L-H Q Read Cycle, Begin Burst external L H L L X X X H L-H High-Z Read Cycle, Begin Burst external L H L H L X H L L-H Q Read Cycle, Begin Burst external L H L H L X H H L-H High-Z Write Cycle, Begin Burst external L H L H L X L X L-H D Read Cycle, Continue Burst next X X X H H L H L L-H Q Read Cycle, Continue Burst next X X X H H L H H L-H High-Z Read Cycle, Continue Burst next H X X X H L H L L-H Q Read Cycle, Continue Burst next H X X X H L H H L-H High-Z Write Cycle, Continue Burst next X X X H H L L X L-H D Write Cycle, Continue Burst next H X X X H L L X L-H D Read Cycle, Suspend Burst current X X X H H H H L L-H Q Read Cycle, Suspend Burst current X X X H H H H H L-H High-Z Read Cycle, Suspend Burst current H X X X H H H L L-H Q Read Cycle, Suspend Burst current H X X X H H H H L-H High-Z Write Cycle, Suspend Burst current X X X H H H L X L-H D Write Cycle, Suspend Burst current H X X X H H L X L-H D |
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