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HD6417750SF167I Datasheet(PDF) 8 Page - Renesas Technology Corp |
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HD6417750SF167I Datasheet(HTML) 8 Page - Renesas Technology Corp |
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8 / 1039 page  Rev. 6.0, 07/02, page vi of I Section Page Item Description 3.3.3 Virtual Address Space 68, 69 Description changed 3.3.4 On-Chip RAM Space 69 Description changed 3.3.7 Address Space Identifier (ASID) 70 Note added 4.1.1 Features Completely revised 95 Table 4.1 Cache Features (SH7750, SH7750S) Completely revised 95 Table 4.2 Cache Features (SH7750R) Newly added 96 Table 4.3 Features of Store Queues Description added 4.2 Register Descriptions 97 Figure 4.1 Cache and Store Queue Control Registers Figure changed and Note added 97 (1) Cache Control Register (CCR) Description added and amended 4.3.1 Configuration Description added 101 Figure 4.3 Configuration of Operand Cache (SH7750R) Newly added 4.3.6 RAM Mode 106 to 107 Description amended and added 4.3.7 OC Index Mode 107 Description added 4.4.1 Configuration 109 Figure 4.5 amended to figure 4.6, description added and amended 110 Figure 4.7 Configuration of Instruction Cache (SH7750R) Newly added 4.6 Memory-Mapped Cache Configuration (SH7750R) 116 Newly added 4.7 Store Queues 122 Description amended and added 4.7.3 Transfer to External Memory 122, 123 Description added 4.7.4 SQ Protection 124 Description added 4.7.5 Reading the SQs (SH7750R Only) 124 Newly added 4.7.6 SQ Usage Notes 125 Newly added 5.2 Register Descriptions 128 Description amended 5.4 Exception Types and Priorities 130 to 132 Table 5.2 Exceptions Description and note added |
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