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MICRF620 Datasheet(PDF) 7 Page - Micrel Semiconductor

Part # MICRF620
Description  434MHz ISM Band Transceiver Module
Download  18 Pages
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Manufacturer  MICREL [Micrel Semiconductor]
Direct Link  http://www.micrel.com
Logo MICREL - Micrel Semiconductor

MICRF620 Datasheet(HTML) 7 Page - Micrel Semiconductor

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Micrel, Inc.
MICRF620
December 2005
7
M9999-120205
Programming
General
The MICRF620 functions are enabled through a number of
programming bits. The programming bits are organized as
a set of addressable control registers, each register
holding 8 bits.
There are 23 control registers in total in the MICRF620,
and they have addresses ranging from 0 to 22. The user
can read all the control registers. The user can write to the
first 22 registers (0 to 21); the register 22 is a read-only
register.
All control registers hold 8 bits and all 8 bits must be
written to when accessing a control register, or they will be
read. Some of the registers do not utilize all 8 bits. The
value of an unused bit is “don’t care.”
The control register with address 0 is referred to as
ControlRegister0, the control register with address 1 is
ControlRegister1 and so on. A summary of the control
registers is given in the table below. In addition to the
unused bits (marked with”-“) there are a number of fixed
bits (marked with “0” or “1”). Always maintain these as
shown in the table.
The control registers in MICRF620 are accessed through a
3-wire interface; clock, data and chip select. These lines
are referred to as SCLK, IO, and CS, respectively. This 3-
wire interface is dedicated to control register access and is
referred to as the control interface. Received data (via RF)
and data to transmit (via RF) are handled by the DataIXO
and DataClk (if enabled) lines; this is referred to as the
data interface.
The SCLK line is applied externally; access to the control
registers are carried out at a rate determined by the user.
The MICRF620 will ignore transitions on the SCLK line if
the CS line is inactive. The MICRF620 can be put on a
bus, sharing clock and data lines with other devices.
All control registers should be written to after a battery
reset. During operation, it is sufficient to write to one
register only. The MICRF620 will automatically enter
power down mode after a battery reset.
Address
Data
A6…A0
D7
D6
D5
D4
D3
D2
D1
D0
0000000
LNA_by
PA2
PA1
PA0
Sync_en
Mode1
Mode0
‘1’
0000001
‘1’
‘0’
‘0’
‘0’
RSSI_en
LD_en
PF_FC1
PF_FC0
0000010
‘0’
‘SC_by’
‘0’
‘PA_by’
‘0’
‘0’
‘0’
‘0’
0000011
‘1’
‘1’
‘0’
VCO_IB2
VCO_IB1
VCO_IB0
VCO_freq1
VCO_freq0
0000100
‘0’
‘0’
‘0’
‘0’
‘0’
‘0’
‘0’
‘0’
0000101
-
-
‘0’
‘1’
‘0’
‘0’
‘0’
‘0’
0000110
-
‘0’
‘0’
‘0’
BitSync_clkS2 BitSync_clkS1 BitSync_clkS0
BitRate_clkS2
0000111 BitRate_clkS1 BitRate_clkS0 RefClk_K5 RefClk_K4
RefClk_K3
RefClk_K2
RefClk_K1
RefClk_K0
0001000
‘1’
‘1’
ScClk5
ScClk4
ScClk3
ScClk2
ScClk1
ScClk0
0001001
‘0’
‘1’
‘1’
XCOtune4
XCOtune3
XCOtune2
XCOtune1
XCOtune0
0001010
-
-
A0_5
A0_4
A0_3
A0_2
A0_1
A0_0
0001011
-
-
-
-
N0_11
N0_10
N0_9
N0_8
0001100
N0_7
N0_6
N0_5
N0_4
N0_3
N0_2
N0_1
N0_0
0001101
-
-
-
-
M0_11
M0_10
M0_9
M0_8
0001110
M0_7
M0_6
M0_5
M0_4
M0_3
M0_2
M0_1
M0_0
0001111
-
-
A1_5
A1_4
A1_3
A1_2
A1_1
A1_0
0010000
-
-
-
-
N1_11
N1_10
N1_9
N1_8
0010001
N1_7
N1_6
N1_5
N1_4
N1_3
N1_2
N1_1
N1_0
0010010
-
-
-
-
M1_11
M1_10
M1_9
M1_8
0010011
M1_7
M1_6
M1_5
M1_4
M1_3
M1_2
M1_1
M1_0
0010100
‘1’
‘0’
‘1’
‘1’
‘0’
‘1’
‘0’
‘1’
0010101
-
-
-
-
FEEC_3
FEEC_2
FEEC_1
FEEC_0
0010110
FEE_7
FEE_6
FEE_5
FEE_4
FEE_3
FEE_2
FEE_1
FEE_0
Table 1. Control Registers in MICRF620


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