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LMG-SSC12A64 Datasheet(PDF) 5 Page - List of Unclassifed Manufacturers

Part No. LMG-SSC12A64
Description  DOT MATRIX LIQUID CRYSTAL DISPLAY MODULE
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Maker  ETC1 [List of Unclassifed Manufacturers]
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 5 page
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Item
Symbol
Limit (Min.)
Limit (Max.)
Unit
E cycle
tcyc
1000
--
ns
E high level width
twhE
450
--
ns
E low level width
twlE
450
--
ns
E rise time
tr
--
25
ns
E fall time
tf
--
25
ns
Address set-up time
tas
140
--
ns
Address hold time
tah
10
--
ns
Data set-up time
tdsw
200
--
ns
Data delay time
tddr
--
320
ns
Data hold time (write)
tdhw
10
--
ns
Data hold time (read)
tdhr
20
--
ns
10. Instruction Set
FUNCTION R/W D/I DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
FUNCTION
1. Display
ON/OFF
0
0
0
0
1
1
1
1
1
1/0 Controls the ON/OFF of the display. RAM data
internal status are not affected. 1:ON, 0:OFF.
2. Display
start line
0
0
1
1
display start line ( 0~63 )
Indicates the display data RAM displayed at the
top of the screen.
3. Set page
( X address)
0
0
1
0
1
1
1
page ( 0~7 )
Sets the page (X address) of RAM at the page (X
address) register.
4. Set address
0
0
0
1
Y address ( 0~63 )
Sets the Y address at the Y address counter.
5. Status Read
1
0
B
U
S
Y
0
ON/
OFF
R
E
S
E
T
0
0
0
0
Reads the status.
RESET
1:Reset,
0:normal.
ON/OFF
1: Display OFF,
0: Display ON.
BUSY
1: In operation.
0: Ready
6. Write
Display Data
0
1
Write Data
Writes data (DB0~7) into display data RAM.
After writing instruction, Y address is increased
by 1 automatically.
7. Read
Display Data
1
1
Read Data
Reads data (DB0~7) from display data RAM to
the data bus.
11. Description Of Instructions
(1) Display ON/OFF
R/W
D/I
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
Code
0
0
0
0
1
1
1
1
1
D
The display data appears when D is 1 and disappers when D is 0.
Though the data is not on the screen width
D=0, it remains in the display data RAM.
Therefore, you can make it appear by changing D=0 or D=1.
(2)
Display start line
R/W
D/I
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
Code
0
0
1
1
A
A
A
A
A
A
Z address AAAAAA (binary) of the display data RAM is set at the display start line register and displayed at the
top of the screen.
(3) Set page (X address)
R/W
D/I
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
Code
0
0
1
0
1
1
1
A
A
A
X address AAA (binary) of the display data RAM is set at the X address register.
After that, writing or from
MPU is executed in this specified page until the next page is set.
(4)
Set Y address
R/W
D/I
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
Code
0
0
0
1
A
A
A
A
A
A
Y address AAAAAA (binary) of the display RAM is set at the Y address counter is increase by every time data is
written or read to or from MPU.
PAGE 4 (LMG-SSC12A64 Serial)




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