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APPLICATION INFORMATION

FUNCTIONAL BLOCK DIAGRAM

VIN

UVLO

ENABLE

Thermal

Protection

Reference

Overcurrent

Gate Drive

Oscillator

Ramp

Generator

VREF

PH

ENA

GND

SHDN

SHDN

BOOT

Z1

Z2

SHDN

SHDN

SHDN

SHDN

VIN

SHDN

HICCUP

HICCUP

SHDN

SHDN

NC

Feed Forward

BOOT

NC

POWERPAD

VIN

VOUT

TPS5430

5 µA

1.221 V Bandgap

Slow Start

Boot

Regulator

Error

Amplifier

Gain = 25

PWM

Comparator

Protection

Gate

Driver

Control

VSENSE

DETAILED DESCRIPTION

Oscillator Frequency

Voltage Reference

Enable (ENA) and Internal Slow Start

TPS5430

SLVS632 – JANUARY 2006

The internal free running oscillator sets the PWM switching frequency at 500 kHz. The 500 kHz switching

frequency allows less output inductance for the same output ripple requirement resulting in a smaller output

inductor.

The voltage reference system produces a precision reference signal by scaling the output of a temperature

stable bandgap circuit. The bandgap and scaling circuits are trimmed during production testing to an output of

1.221 V at room temperature.

The ENA pin provides electrical on/off control of the regulator. Once the ENA pin voltage exceeds the threshold

voltage, the regulator starts operation and the internal slow start begins to ramp. If the ENA pin voltage is pulled

below the threshold voltage, the regulator stops switching and the internal slow start resets. Connecting the pin

to ground or to any voltage less than 0.5 V will disable the regulator and activate the shutdown mode. The

quiescent current of the TPS5430 in shutdown mode is typically 18

µA.

The ENA pin has an internal pullup current source, allowing the user to float the ENA pin. If an application

requires controlling the ENA pin, use open drain or open collector output logic to interface with the pin. To limit

the start-up inrush current, an internal slow start circuit is used to ramp up the reference voltage from 0 V to its

final value linearly. The internal slow start time is 8ms typically.

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