41LV16100B-50TI datasheet(3/22 Pages) ISSI

Part #	41LV16100B-50TI

Description	1M x 16 (16-MBIT) DYNAMIC RAM WITH EDO PAGE MODE

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Manufacturer	ISSI [Integrated Silicon Solution, Inc]

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IS41LV16100B

Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774

3

Rev. B

04/13/05

ISSI®

TRUTH TABLE

Function

RAS

LCAS

LCAS UCAS

UCAS

WE

OE

Address tR/tC

I/O

Standby

H

X

High-Z

Read: Word

L

H

L

ROW/COL

DOUT

Read: Lower Byte

L

H

L

ROW/COL

Lower Byte, DOUT

Upper Byte, High-Z

Read: Upper Byte

L

H

L

H

L

ROW/COL

Lower Byte, High-Z

Upper Byte, DOUT

Write: Word (Early Write)

L

X

ROW/COL

DIN

Write: Lower Byte (Early Write)

L

H

L

X

ROW/COL

Lower Byte, DIN

Upper Byte, High-Z

Write: Upper Byte (Early Write)

L

H

L

X

ROW/COL

Lower Byte, High-Z

Upper Byte, DIN

Read-Write(1,2)

LL

L

H

→LL→H

ROW/COL

DOUT, DIN

EDO Page-Mode Read(2) 1st Cycle:

L

H

→LH→L

H

L

ROW/COL

DOUT

2nd Cycle:

L

H

→LH→L

H

L

NA/COL

DOUT

Any Cycle:

L

→HL→H

H

L

NA/NA

DOUT

EDO Page-Mode Write(1) 1st Cycle:

L

H

→LH→L

L

X

ROW/COL

DIN

2nd Cycle:

L

H

→LH→L

L

X

NA/COL

DIN

EDO Page-Mode(1,2)

1st Cycle:

L

H

→LH→LH→LL→H

ROW/COL

DOUT, DIN

Read-Write

2nd Cycle:

L

H

→LH→LH→LL→H

NA/COL

DOUT, DIN

Hidden Refresh

Read(2)

L

→H→L

L

H

L

ROW/COL

DOUT

Write(1,3)

L

→H→L

L

X

ROW/COL

DOUT

RAS-Only Refresh

L

H

X

ROW/NA

High-Z

CBR Refresh(4)

H

→L

L

X

High-Z

Notes:

1. These WRITE cycles may also be BYTE WRITE cycles (either

LCAS or UCAS active).

2. These READ cycles may also be BYTE READ cycles (either

LCAS or UCAS active).

3. EARLY WRITE only.

4. At least one of the two

CAS signals must be active (LCAS or UCAS).

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