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| TLV320AIC31 |
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www.ti.com DEVICE INFORMATION PIN ASSIGNMENTS 1 (bottom view) 8 9 16 17 24 25 32 TLV320AIC31 SLAS497 – DECEMBER 2005 TERMINAL FUNCTIONS TERMINAL DESCRIPTION NAME QFN NO. I/O MCLK 1 I Master clock input BCLK 2 I/O Audio serial data bus bit clock input/output WCLK 3 I/O Audio serial data bus word clock input/output DIN 4 I Audio serial data bus data input DOUT 5 O Audio serial data bus data output DVSS 6 I/O Digital core / I/O Ground Supply, 0 V IOVDD 7 I/O Digital I/O voltage supply, 1.1 V – 3.6 V SCL 8 I/O I2C serial clock input SDA 9 I/O I2C serial data input/output IN1LP 10 I Left input 1 (SE) or Left Input + (Diff) IN1LM 11 I Left input - (Diff only) IN1RP 12 I Right input 1 (SE) or Right Input + (Diff) IN1RM 13 I Right input - (Diff only) IN2L 14 I Left input 2 (SE) MICBIAS 15 O Microphone bias voltage output IN2R 16 I Right input 2 (SE) AVSS1 17 I Analog ADC ground supply, 0 V DRVDD 18 O Analog ADC and output driver voltage supply, 2.7 V – 3.6 V HPLOUT 19 O High power output driver (left +) HPLCOM 20 O High power output driver (left - or multi-functional) DRVSS 21 O Analog output driver ground supply, 0 V HPRCOM 22 O High power output driver (right - or multi-functional) HPROUT 23 O High power output driver (right +) DRVDD 24 O Analog output driver voltage supply, 2.7 V – 3.6 V AVDD 25 I Analog DAC voltage supply, 2.7 V – 3.6 V AVSS2 26 I Analog DAC ground supply, 0 V LEFT_LOP 27 O Left line output (+) LEFT_LOM 28 O Left line output (-) RIGHT_LOP 29 O Right lineo output (+) 3 |
