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HD6433833SX Datasheet(PDF) 7 Page - Renesas Technology Corp |
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HD6433833SX Datasheet(HTML) 7 Page - Renesas Technology Corp |
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7 / 560 page  i Contents Section 1 Overview............................................................................................................ 1 1.1 Overview ............................................................................................................................ 1 1.2 Internal Block Diagram ...................................................................................................... 5 1.3 Pin Arrangement and Functions ......................................................................................... 6 1.3.1 Pin Arrangement ................................................................................................... 6 1.3.2 Pin Functions......................................................................................................... 8 Section 2 CPU...................................................................................................................... 13 2.1 Overview ............................................................................................................................ 13 2.1.1 Features ................................................................................................................. 13 2.1.2 Address Space ....................................................................................................... 14 2.1.3 Register Configuration .......................................................................................... 14 2.2 Register Descriptions.......................................................................................................... 15 2.2.1 General Registers .................................................................................................. 15 2.2.2 Control Registers................................................................................................... 15 2.2.3 Initial Register Values ........................................................................................... 17 2.3 Data Formats ...................................................................................................................... 17 2.3.1 Data Formats in General Registers........................................................................ 18 2.3.2 Memory Data Formats .......................................................................................... 19 2.4 Addressing Modes.............................................................................................................. 20 2.4.1 Addressing Modes................................................................................................. 20 2.4.2 Effective Address Calculation............................................................................... 22 2.5 Instruction Set .................................................................................................................... 26 2.5.1 Data Transfer Instructions ..................................................................................... 28 2.5.2 Arithmetic Operations ........................................................................................... 30 2.5.3 Logic Operations ................................................................................................... 31 2.5.4 Shift Operations .................................................................................................... 31 2.5.5 Bit Manipulations.................................................................................................. 33 2.5.6 Branching Instructions .......................................................................................... 37 2.5.7 System Control Instructions.................................................................................. 39 2.5.8 Block Data Transfer Instruction............................................................................ 40 2.6 Basic Operational Timing .................................................................................................. 41 2.6.1 Access to On-Chip Memory (RAM, ROM).......................................................... 41 2.6.2 Access to On-Chip Peripheral Modules................................................................ 42 2.7 CPU States.......................................................................................................................... 43 2.7.1 Overview ............................................................................................................... 43 2.7.2 Program Execution State ....................................................................................... 45 2.7.3 Program Halt State ................................................................................................ 45 2.7.4 Exception-Handling State ..................................................................................... 45 |
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