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NCV8504PWADJ Datasheet(PDF) 9 Page - ON Semiconductor

Part # NCV8504PWADJ
Description  Micropower 400 mA LDO Linear Regulators with DELAY, Adjustable RESET, and General Use Comparator
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Manufacturer  ONSEMI [ON Semiconductor]
Direct Link  http://www.onsemi.com
Logo ONSEMI - ON Semiconductor

NCV8504PWADJ Datasheet(HTML) 9 Page - ON Semiconductor

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NCV8504 Series
http://onsemi.com
9
CIRCUIT DESCRIPTION
REGULATOR CONTROL FUNCTIONS
The NCV8504 contains the microprocessor compatible
control function RESET (Figure 13).
Figure 13. Reset and Delay Circuit Wave Forms
VIN
VOUT
RESET
DELAY
(VDT)
Threshold
DELAY
Threshold
RESET
Td
Td
RESET Function
A RESET signal (low voltage) is generated as the IC
powers up until VOUT is within 1.5% of the regulated output
voltage, or when VOUT drops out of regulation,and is lower
than 4.0% below the regulated output voltage. Hysteresis is
included in the function to minimize oscillations.
The RESET output is an open collector NPN transistor,
controlled by a low voltage detection circuit. The circuit is
functionally independent of the rest of the IC thereby
guaranteeing that the RESET signal is valid for VOUT as low
as 1.0 V.
Adjustable Reset Function
The reset threshold can be made lower by connecting an
external resistor divider to the RADJ lead from the VOUT
lead, as displayed in Figure 14. This lead is grounded to
select the default value of 4.6 V (on the 5.0 V option).
Figure 14. Adjustable RESET
RADJ
to
µP and
System
Power
RRST
VOUT
COUT
RESET
CDELAY
DELAY
NCV8504
to
µP and
RESET
Port
VR(ADJ)
DELAY Function
The reset delay circuit provides a programmable (by
external capacitor) delay on the RESET output lead.
The DELAY lead provides source current (typically 4.0
µA)
to the external DELAY capacitor during the following
proceedings:
1. During Power Up (once the regulation threshold
has been verified).
2. After a reset event has occurred and the device is
back in regulation. The DELAY capacitor is
discharged when the regulation (RESET threshold)
has been violated. This is a latched incident. The
capacitor will fully discharge and wait for the
device to regulate before going through the delay
time event again.
FLAG/Monitor Comparator
A general use comparator is included whose positive input
terminal is tied to the on−chip bandgap voltage reference.
This provides a very temperature stable referenced
comparator with versatile use in any system. The trip point
can be programmed externally using a resistor divider to the
input monitor (MON) (Figure 15). The typical threshold is
1.29 V on the MON pin.
Figure 15. Flag/Monitor Function
VBAT
VIN
MON
VOUT
COUT
VCC
I/O
RESET
µP
FLAG
RESET
GND
DELAY
NCV8504
RADJ
VMON
Voltage Adjust
Figure 16 shows the device setup for a user configurable
output voltage. The feedback to the VADJ pin is taken from
a voltage divider referenced to the output voltage. The loop
is balanced around the Unity Gain threshold (1.30 V
typical).
Figure 16. Adjustable Output
Voltage
VOUT
VADJ
NCV8504
15 k
5.1 k
COUT
≈5.0 V
1.28 V


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