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AN9DB00 Datasheet(PDF) 1 Page - Panasonic Semiconductor

Part No. AN9DB00
Description  Analog master slice IC series
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Maker  PANASONIC [Panasonic Semiconductor]
Homepage  http://www.panasonic.com/industrial/
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Analog Master Slice
1
AN9D, AN9E, AN9F Series
Analog master slice IC series
s Overview
The AN9D, AN9E and AN9F series are master slice ICs of bipolar process, which enables you to integrate an analog
circuit easily onto a single chip. A custom IC can be made by placing a wired pattern designed in line with the customer's
analog circuit onto a master slice.
Starting from a wafer on which a most part of IC diffusion processes are already finished, you can shorten an IC pilot
fabrication considerably. Further, placement of elements and inter-element wiring are done automatically by a com-
puter, which results in short period of pattern designing and thereby developing a custom IC in a short period.
s Features
• High design flexibility
• Easy circuit constant design because of setting resistance or capacitance to an arbitrary value.
• Free setting of contacts between a substrate and GND wiring prevents from operation error to be caused by floating
of substrate potential.
• Usable for multi power source because a resistor island potential can be set for each unit.
• Builds in a lateral type PNP transistor of high reverse breakdown voltage between base and emitter, or a collector
wall type NPN transistor of excellent saturation characteristics. (AN9DA00, AN9DB00, AN9DF00)
• Short development period
• Due to a full automatic layout design, a sample is available in one month from a completion of a circuit diagram.
• Applicable to a small quantity production item
• Possible to develop a custom IC for small quantity production due to a low development cost.
s Development Flow
1 000 elements in case
of general-use process
1week 3weeks
Full
custom
Master
slice
Layout
8weeks
Diffusion,
assembly
6weeks
EWS
Matsushita side
Customer side
Full automatic
layout
Mask layout
System design
Circuit design
Test specification, etc.
Drastic shrinkage of TAT
for small quantity production
Wiring, assembly
Fabricated wafer
Check
Chip
Evaluation
Wired mask only
Selection




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