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MT5C1005 Datasheet(PDF) 4 Page - Austin Semiconductor |
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MT5C1005 Datasheet(HTML) 4 Page - Austin Semiconductor |
4 / 13 page SRAM MT5C1005 Austin Semiconductor, Inc. MT5C1005 Rev. 3.1 1/01 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 4 ELECTRICAL CHARACTERISTICS AND RECOMMENDED AC OPERATING CONDITIONS (Note 5) (-55oC < T C < 125 oC; V CC = 5V +10%) MIN MAX MIN MAX MIN MAX MIN MAX UNITS NOTES READ CYCLE READ cycle time tRC 20 25 35 45 ns Address access time tAA 20 25 35 45 ns Chip Enable access time tACE 20 25 35 45 ns Output hold from address change tOH 3333 ns Chip Enable to output in Low-Z tLZCE 3333 ns 4, 6, 7 Chip disable to output in High-Z tHZCE 10 12 20 25 ns 4, 6, 7 Chip Enable to power-up time tPU 0000 ns 4 Chip disable to power-down time tPD 20 25 35 45 ns 4 Output Enable access time tAOE 8 102025 ns Output Enable to output in Low-Z tLZOE 0000 ns 4, 6, 7 Output disable to output in High-Z tHZOE 8 10 20 25 ns 4, 6, 7 WRITE CYCLE WRITE cycle time tWC 20 25 35 45 ns Chip Enable to end of write tCW 15 20 30 35 ns Address valid to end of write tAW 15 20 30 35 ns Address setup time tAS 0000 ns Address hold from end of write tAH 0000 ns WRITE pulse width tWP 15 20 30 35 ns Data setup time tDS 12 15 20 25 ns Data hold time tDH 0000 ns Write disable to output in Low-Z tLZWE 3333 ns 4, 6, 7 Write Enable to output in High-Z tHZWE 0 8 0 10 0 15 0 20 ns 4, 6, 7 -35 -45 DESCRIPTION -20 SYMBOL -25 |
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