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M62398FP Datasheet(PDF) 4 Page - Mitsubishi Electric Semiconductor |
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M62398FP Datasheet(HTML) 4 Page - Mitsubishi Electric Semiconductor |
4 / 7 page MITSUBISHI ELECTRIC 1997-5-28D.rev MITSUBISHI <Dig./Ana. INTERFACE> M62398P,FP 8BIT 12CH I C BUS D–A CONVERTER WITH BUFFER AMPLIFIERS ( / 7) 2 4 I2C BUS LINE CHARACTERISTICS SCL clock frequency Time the bus must be free before a new transmission can start fSCL tBUF tHD:STA tLOW tHIGH tSU:STA tHD:DAT tSU:DAT tR tF tSU:STO KHz µs ns ns ns Min. 0 4.7 4.0 4.7 4.0 4.7 0 250 4.0 - - Max. 100 1000 300 - - - - - - - - Min. 0 1.3 0.6 1.3 0.6 4.7 0 100 0.6 20+ 20+ Max. 400 300 300 - - - - - 0.9 - - Parameter Hold time START Condition. After this period,the first clock pulse is generated. LOW period of the clock High period of the clock Set-up time for START condition (Only relevant for a repeated START condition) Hold time DATA Set-up time DATA Rise time of both SDA and SCL lines Fall time of both SDA and SCL lines Set-up time for STOP condition *Note that a transmitter must internally provide at least a hold time to bridge the undefined region (max.300 ns) of the falling edge of SCL. Symbol Normal mode High speed mode units TIMING CHART µs µs µs µs µs µs tR, tF tBUF tLOW tHIGH tHD:DAT tSU:DAT SDA SCL VIH VIL VIH VIL tHD:STA tSU:STA tSU:STO START START STOP START |
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