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M512X Datasheet(PDF) 3 Page - List of Unclassifed Manufacturers

Part # M512X
Description  Mega I/O Controller with Plug & Play
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Manufacturer  ETC1 [List of Unclassifed Manufacturers]
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Acer Laboratories Inc.
--Preliminary, Confidential, Proprietary--
M512x : Mega I/O Controller with PnP
07-02-1997 Document Number: 512xDS02.doc
Page 3
Acer Labs: 7F, 115 Tung Hsing Street, Taipei 110, Taiwan, R.O.C. Tel: 886-(02) 762-8800
Fax: 762-6060
Section 1 : Introduction
Features and Functions
The Acer Labs' M512x chip has two full-function universal
asynchronous receiver/ transmitters (UARTs), a keyboard
interface, real time clock, a floppy disk controller (FDC) with
data separator, parallel port, standard XT/AT address
decoding for on-chip functions, and a configuration register.
It offers a single-chip solution to the most common IBM PC,
XT, AT and Notebook peripherals.
The floppy disk controller is fully compatible with the
industry-standard 765A and 82077SL architecture.
It
includes
more
advanced
options
such
as
a
high
performance data separator, extended track range to 4096,
high
performance
power
management,
implied
seek
command, scan command, and supports both IBM and ISO
360K/1.2M/720K/1.44M/2.88M FDD formats.
The UARTs
are compatible with either the INS8250N-B, NS16450 and
16550.
It has complete compatibility with the IBM AT's
parallel port.
The configuration register is one-byte wide
and can be programmed via hardware or software.
By
controlling this register, the user can assign standard AT
addresses and disable any major on-chip function (e.g., the
FDC, either UART, or the parallel port) independent of the
others.
This allows for flexibility in system configuration
when adapter boards contain duplicate functions.
The M512x provides support for the ISA Plug-and-Play
standard
and
recommended
functionality
to
support
Windows ‘ 95.
Through internal configuration registers,
each of the M512x’ s logic device’ s I/O address, DMA
channel and IRQ channel may be programmed. There are
96 I/O address location options, 13 IRQ options, and three
DMA channel options for each logical device except KBC
and RTC. KBC’ s I/O address is not routable. RTC’ s I/O
address and IRQ are not routable as well.
1.2 M512x Block Diagrams
The following figures show the overall block diagram of the
M512x.


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