Micro Networks

324 Clark Street

Worcester, MA 01606

tel: 508-852-5400

fax: 508-852-8456

www.micronetworks.com

M2004-01

Preliminary Specifications

7

Micro Networks

An Integrated Circuit Systems Company

LVPECL DC CHARACTERISTICS

Symbol

Parameter

Signal

Min

Max

Units

V

OH

Output High Voltage: Note 1

FOUT, nFOUT

V

Vcc – 1.0

V

V

OL

Output Low Voltage: Note 1

FOUT, nFOUT

V

Vcc – 1.7

V

V

SWING

Peak-to-Peak Output Voltage Swing

FOUT, nFOUT

0.6

0.85

V

Note 1: Output terminated with 50Ω to V

AC CHARACTERISTICS

INPUT FREQUENCY CHARACTERISTICS

Symbol

Parameter

Test Conditions

Min

Max

Units

F

IN

Input Frequency

REF_CLK0, REF_CLK1

10

166

MHz

S_CLOCK

50

MHz

V

Symbol

Parameter

Test Conditions

Min

Typ

Max

Units

F

OUT

Output Frequency

38.88

700

MHz

ØNOISE

Single Side Band

1kHz offset

-72

dBc/Hz

Phase Noise

10kHz offset

-94

dBc/Hz

100kHz offset

-123

dBc/Hz

J (t)

Jitter (RMS)

12kHz to 20 MHz

0.69

ps

odc

Output Duty Cycle

50

%

t

R

Output Rise Time

FOUT = 155MHz

20% to 80%, each

350

450

550

ps

(Note 1)

for output pairs

FOUT = 311MHz

output of pair measured

325

425

500

ps

FOUT0, nFOUT0 &

FOUT = 622MHz

is terminated into 50Ω

200

275

350

ps

FOUT1, nFOUT1

load biased at Vcc-2V

t

F

Output Fall Time

FOUT = 155MHz

20% to 80%, each

350

450

550

ps

(Note 1)

for output pairs

FOUT = 311MHz

output of pair measured

325

425

500

ps

FOUT0, nFOUT0 &

FOUT = 622MHz

is terminated into 50Ω

200

275

350

ps

FOUT1, nFOUT1

load biased at Vcc-2V

t

S

Setup Time

M, N, to nP_LOAD

5

ns

S_DATA to S_CLK

5

ns

S_CLK to S_LOAD

5

ns

t

H

Hold Time

M,N, to nP_LOAD

5

ns

S_DATA to S_CLK

5

ns

S_CLK to S_LOAD

5

ns

t

LOCK

PLL Lock Time

1

ms

t

PW

Output Pulse

TBD

ns

Width

TBD

ns

Note: The output frequencies of 155MHz, 311MHz and 622MHz were chosen for device characterization as these are common optical network clock frequencies.