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MSP3450G Datasheet(PDF) 22 Page - Micronas |
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MSP3450G Datasheet(HTML) 22 Page - Micronas |
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22 / 106 page  MSP 34x0G DATA SHEET 22 May 27, 2003; 6251-476-1DS Micronas Table 3–6: List of MSP 34x0G Read Registers Read Register Address (hex) Bits Description and Adjustable Range See Page I2C Subaddress = 11hex ; Registers are not writable STANDARD RESULT 00 7E [15:0] Result of Automatic Standard Detection (see Table 3–8 on page 25) 28 STATUS 02 00 [15:0] Monitoring of internal settings e.g. Stereo, Mono, Mute etc. . 28 I2C Subaddress = 13hex ; Registers are not writable Quasi peak readout left 00 19 [15:0] [00hex ... 7FFFhex]16 bit two’s complement 42 Quasi peak readout right 00 1A [15:0] [00hex ... 7FFFhex]16 bit two’s complement 42 MSP hardware version code 00 1E [15:8] [00hex ... FFhex]42 MSP major revision code [7:0] [00hex ... FFhex]42 MSP product code 00 1F [15:8] [00hex ... FFhex]42 MSP ROM version code [7:0] [00hex ... FFhex]42 |
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