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LM4954TL Datasheet(PDF) 5 Page - National Semiconductor (TI) |
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LM4954TL Datasheet(HTML) 5 Page - National Semiconductor (TI) |
5 / 16 page Note 1: All voltages are measured with respect to the ground pin, unless otherwise specified. Note 2: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional, but do not guarantee specific performance limits. Electrical Characteristics state DC and AC electrical specifications under particular test conditions which guarantee specific performance limits. This assumes that the device is within the Operating Ratings. Specifications are not guaranteed for parameters where no limit is given, however, the typical value is a good indication of device performance. Note 3: The maximum power dissipation must be derated at elevated temperatures and is dictated by TJMAX, θJA, and the ambient temperature TA. The maximum allowable power dissipation is PDMAX =(TJMAX –TA)/ θJA or the number given in Absolute Maximum Ratings, whichever is lower. For the LM4954, see power derating curves for additional information. Note 4: Human body model, 100pF discharged through a 1.5k Ω resistor. Note 5: Machine Model, 220pF – 240pF discharged through all pins. Note 6: Typical specifications are specified at 25˚C and represent the parametric norm. Note 7: Tested limits are guaranteed to National’s AOQL (Average Outgoing Quality Level). Note 8: Datasheet min/max specification limits are guaranteed by design, test, or statistical analysis. Note 9: Shutdown current is measured in a normal room environment. Exposure to direct sunlight in the TL package will increase ISD by a minimum of 2µA. Note 10: All bumps have the same thermal resistance and contribute equally when used to lower thermal resistance. The θJA in the Thermal Resistance section is for the ITL package without any heat spreading planes on the PCB. Note 11: The demo board shown has 1.1in2 (710mm2) heat spreading planes on the two internal layers and the bottom layer. The bottom internal layer is electrically VDD while the top internal and bottom layers are electrically GND. Thermal performance for the demo board is found on the Power Derating graph in the Typical Performance Characteristics section. 7V operation requires heat spreading planes for the thermal stability. External Components Description (Figure 1) Components Functional Description 1. R i Inverting input resistance which sets the closed-loop gain in conjunction with R f. This resistor also forms a high pass filter with C i at fC = 1/(2 π R iCi). 2. C i Input coupling capacitor which blocks the DC voltage at the amplifiers input terminals. Also creates a highpass filter with R i at fc = 1/(2 π R iCi). Refer to the section, Proper Selection of External Components, for an explanation of how to determine the value of C i. 3. R f Feedback resistance which sets the closed-loop gain in conjunction with R i.AVD =2*(Rf/Ri). 4. C S Supply bypass capacitor which provides power supply filtering. Refer to the Power Supply Bypassing section for information concerning proper placement and selection of the supply bypass capacitor. 5. C B Bypass pin capacitor which provides half-supply filtering. Refer to the section, Proper Selection of External Components, for information concerning proper placement and selection of C B. www.national.com 5 |
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