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TDA8261TW Datasheet(PDF) 6 Page - NXP Semiconductors |
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TDA8261TW Datasheet(HTML) 6 Page - NXP Semiconductors |
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6 / 22 page  2004 Dec 02 6 Philips Semiconductors Product specification Satellite Zero-IF QPSK/8PSK downconverter with PLL synthesizer TDA8261TW FUNCTIONAL DESCRIPTION The TDA8261TW contains the core of the RF analog part of a digital satellite receiver. The signal coming from the Low Noise Block (LNB) is coupled through a Low Noise Amplifier (LNA) to the RF inputs. The circuitry in the TDA8261TW performs the Zero-IF quadrature frequency conversion and the two in-phase (IBBOUT) and quadrature (QBBOUT) output signals can be used directly to feed a SDD circuit. The relative phase of I and Q signals is measured on the baseband outputs, when a sine wave unmodulated carrier at flo + 1 MHz is present at the RF input of the TDA8261TW (see Fig.3). The TDA8261TW has a gain controlled amplifier which is controlled by the SDD. An external VCO tank circuit is connected between pins TKA and TKB. The main elements of the external tank circuit are an SMD coil and a varactor diode. The tuning voltage of 0 to 30 V covers the whole frequency range from 237.5 to 543.75 MHz. The internal loop controls a fully integrated VCO to cover the range 950 to 2175 MHz. The VCO provides both in-phase and quadrature signals to drive the two mixers. The TDA8261TW integrates all elements necessary to control the varactor tuned oscillator except a 4 MHz crystal and a loop filter. It includes a fast phase detector with high comparison frequency to get the lowest phase noise level in the local oscillator. The fDIV output of the15-bit programmable divider passes through the fast phase comparator where it is compared in both phase and frequency with the comparison frequency (fCOMP). fCOMP is derived from the signal present at the pins XT1 and XT2 (fXTAL) divided-down by the reference divider. The buffered XTOUT signal can drive the crystal frequency input of the SDD, saving a crystal in the application. The output of the phase comparator drives the charge pump and loop amplifier section. The loop amplifier includes a high voltage transistor to handle the 30 V tuning voltage at pin VT, this drives a variable capacitance diode in the external circuit of the voltage controlled oscillator. Pin CP is the output of the charge pump. The loop filter is connected between pins CP and VT and the post-filter section is connected between pin VT and the variable capacitance diode. For test and alignment purposes, it is possible to release the tuning voltage output and apply an external voltage on pin VT and to select the charge pump function to sink current, source current or to be switched off. handbook, halfpage input spectrum output phase output signal channel I frequency t flo fRF = flo +1 MHz channel Q 90 ° MBL864 Fig.3 Relative phase of I and Q signals. |
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