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S24VP04SI-2.7TE13 Datasheet(PDF) 8 Page - List of Unclassifed Manufacturers

Part # S24VP04SI-2.7TE13
Description  4K Serial E2PROM with a Precision Low-VCC Lockout Circuit
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Manufacturer  ETC1 [List of Unclassifed Manufacturers]
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Logo ETC1 - List of Unclassifed Manufacturers

S24VP04SI-2.7TE13 Datasheet(HTML) 8 Page - List of Unclassifed Manufacturers

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S24VP04
2008 1.4 5/15/98
Sequential READ
Sequential READs can be initiated as either a current
address READ or random access READ. The first word is
transmitted as with the other byte read modes (current
address byte READ or random address byte READ);
however, the master now responds with an ACKnowledge,
indicating that it requires additional data from the
S24VP04. The S24VP04 continues to output data for
each ACKnowledge received. The master terminates the
sequential READ operation by not responding with an
ACKnowledge, and issues a STOP conditions.
During a sequential read operation, the internal address
counter is automatically incremented with each acknowl-
edge signal. For read operations, all address bits are
incremented, allowing the entire array to be read using a
single read command. After a count of the last memory
address, the address counter will ‘roll-over’ and the
memory will continue to output data. See Figure 10 for the
address, acknowledge and data transfer sequence.
FIGURE 10. SEQUENTIAL READ OPERATION (starting with a Random Address READ)
D
7
D
6
D
5
D
4
D
3
D
2
D
1
D
0
D
7
D
6
D
5
D
4
D
3
D
2
D
1
D
0
A
7
A
6
A
5
A
4
A
3
A
2
A
1
A
0
Shading Denotes
24VP04
SDA Output Active
S
T
A
R
T
Word Address
S
T
O
P
A
C
K
Acknowledges from 24VP04
Slave Address
Slave Address
Device
Type
Address
Read/Write
0= Write
Device
Type
Address
A2,A1,BS
A2,A1,BS
SDA Bus
Activity
S
T
A
R
T
Read/Write
1= Read
A
1
R
W
A
2
Acknowledge from
Master Receiver
A
C
K
A
C
K
A
C
K
Master sends Read
request to Slave
Master Writes Word
Address to Slave
Master Requests
Data from Slave
Slave sends
Data to Master
Slave Transmitter
to
Master Receiver
Slave Transmitter
to
Master Receiver
Master Transmitter
to
Slave Receiver
10 10
10 10
1
0
Slave sends
Data to Master
A
2
A
1
R
W
B
S
B
S
Lack of ACK (low)
determines last
data byte to be read
1
Lack of
Acknowledge from
Master Receiver
Slave Transmitter
to
Master Receiver
Master Transmitter
to
Slave Receiver
Master Transmitter
to
Slave Receiver
Master Transmitter
to
Slave Receiver
Slave Transmitter
to
Master Receiver
Slave Transmitter
to
Master Receiver
Last Data Byte
First Data Byte
2008 ILL 12 1.0


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