UC62LS2008HC datasheet(3/11 Pages) ETC1

Part #	UC62LS2008HC

Description	Low Power CMOS SRAM 256K X 8 Bits

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Low Power CMOS SRAM

256K X 8 Bits

UC62LS2008

-20/-25

DC ELECTRICAL CHARACTERISTICS (TA=0℃ to 70℃)

Symbol

Comment

Test Condition

MIN.

TYP.

(1)

MAX.

UNITS

VIL

Guaranteed Input Low

Voltage

(2)

VCC=2.4V

-0.5

-

0.8

V

VIH

Guaranteed Input High

Voltage

(2)

VCC=3.6V

2.0

-

Vcc-0.2

V

IL

Input Leakage Current

VCC=3.6V VIN=0V to VCC

-

1

uA

IOL

Output Leakage Current

VCC=3.6V CE\=VIH or OE\=VIH

VIO=0V t VCC

-

1

uA

VOL

Output Low Voltage

VCC=3.6V, IOL=2mA

-

0.4

V

VOH

Output High Voltage

VCC=3.0V, IOH=-1mA

2.4

-

V

ICC

Operating Power Supply

Current

CE\=VIL,IDQ=0mA, F=Fmax

(3)

-

20

mA

ISB1

TTL Standby Current

CE\=VIH, VIN=VIH to VIL

-

1

mA

ISB2

CMOS Standby Current

CE\≧VCC-0.2V, VIN=VCC-0.2V

to 0.2V

-

1

5

uA

1. Typical characteristics are at TA = 25oC.

2. These are absolute values with respect to device ground and all overshoots due to system or tester notice are included.

3. Fmax = 1/tRC .

DATA RETENTION CHARACTERISTICS ( TA=0℃ to 70℃)

Symbol

Comment

Test Condition

MIN.

TYP.

(1)

MAX.

UNITS

VDR

VCC to Data Retention

CE\≧VCC - 0.2V

VIN≧VCC-0.2V or VIN≦0.2V

1.2

-

V

ICCDR

Data Retention Current

CE\≧VCC - 0.2V

VIN≧VCC-0.2V or VIN≦0.2V

-

0.05

0.5

uA

tDR

Chip Deselect to Data

Retention Time

0

-

ns

tR

Operation Recovery Time

See Retention Waveform

TRC

(2)

-

ns

1.

VCC = 1.5V, TA = 25℃.

2.

tRC = Read Cycle Time

LOW VCC DATA RETENTION WAVEFORM

(1) (CE\ Controlled)

Data Retention Mode

V

DR >= 1.2V

t

CDR

t

R

VIH

CE >= V

CC - 0.2V

Vcc

CE

U-Chip Technology Corp. LTD.

Preliminary

Rev.1.0

Reserves the right to modify document contents without notice.

PAGE

3

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