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UPSD3234A-24T1 Datasheet(PDF) 4 Page - STMicroelectronics |
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UPSD3234A-24T1 Datasheet(HTML) 4 Page - STMicroelectronics |
4 / 8 page µPSD3200 FAMILY 4/8 Table 1. 80-Pin Package Pin Description Note: PSD Port A and MCU Address/Data bus are added for 80-pin device Signal Name In/Out Function Basic Alternate AD7-AD0 I/O Multiplexed Address/Data bus A11-A8 I/O External Address Bus RxD2-RxD1 I/O General I/O port pins UART Receive TxD2-TxD1 I/O UART Transmit INT1-INT0 I/O Interrupt inputs / timer gate controls T2-T0 I/O Counter inputs SDA1-SDA2 I/O I2C Bus serial data I/O / DDC interface SCL1-SCL2 I/O I2C Bus clock I/O VSYNC I/O VSYNC input for DDC interface T2EX I/O Timer 2 Trigger input ADC3-ADC0 I/O ADC Channels input PWM4-PWM0 I/O 8-bit Pulse Width Modulation outputs USB-, USB+ I/O USB I/O AVREF O Reference Voltage input for ADC RD_ O Read signal, external bus WR_ O Write signal, external bus PSEN_ O PSEN signal, external bus ALE O Address Latch signal, external bus RESET_ I Active low reset input XTAL1 I Oscillator input pin for system clock XTAL2 O Oscillator output pin for system clock PA7-PA0 I/O General I/O port pins 1. PLD Macro-cell outputs 2. PLD inputs 3. Latched Address Out (A0-A7) 4. Peripheral I/O mode PB7-PB0 I/O General I/O port pins 1. PLD Macro-cell outputs 2. PLD inputs 3. Latched Address Out (A0-A7) PC7-PC0 I/O General I/O port pins 1. PLD Macro-cell outputs 2. PLD inputs 3. SRAM stand by voltage input (VSTBY) 4. JTAG Interface (TDI, TDO, TMS, TCK, TSTAT, TERR) 5. SRAM battery-on indicator (PC4) PD2-PD1 I/O General I/O port pin 1. PLD I/O 2. Clock input to PLD and APD 3. Chip select to PSD Module |
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