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C9714
100 MHz Clock Generator with SSCG and Power Management for Mobile Application
Approved Product
INTERNATIONAL MICROCIRCUITS, INC. 525 LOS COCHES ST.
Rev. 2.0
5/17/2000
MILPITAS, CA 95035 TEL: 408-263-6300 ext. 275 FAX 408-263-6571
Page 10 of 13
Crystal and Reference Oscillator Parameters
Characteristic
Symbol
Min
Typ
Max
Units
Conditions
Frequency
Fo
12.00
14.31818
16.00
MHz
Tolerance
TC
-
-
+/-100
PPM
Calibration note 1
TS
-
-
+/- 100
PPM
Stability (Ta -10 to +60C) note 1
Mode
OM
-
-
-
Parallel Resonant
Pin Capacitance
CP
5
pF
Capacitance of XIN and Xout pins
DC Bias Voltage
VBIAS
0.3Vdd
Vdd/2
0.7Vdd
V
Startup time
Ts
-
-
30
µS
Load Capacitance
CL
-
20
-
pF
note 1
Effective Series
resistance
R1
-
-
40
Ohms
Power Dissipation
DL
-
-
0.10
mW
note 1
Shunt Capacitance
CO
-
--
7
pF
X1 and X2 Load
CL
32
pF
internal crystal loading capacitors on
each pin (to ground)
For maximum accuracy, the total circuit loading capacitance should be equal to CL. This loading capacitance is the
effective capacitance across the crystal pins and includes the device pin capacitance (CP) in parallel with any circuit
traces, the clock generator and any onboard discrete load capacitors.
Budgeting Calculations
Typical trace capacitance, (< half inch) is 4 pF, Load to the crystal is therefore
2.0 pF
Clock generator internal pin capacitance of 36 pF, Load to the crystal is therefore
18.0 pF
the total parasitic capacitance would therefore be
= 20.0 pF(matching CL)
Note 1: It is recommended but not mandatory that a crystal meets these specifications.
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