SN74LS74A

http://onsemi.com

4

Figure 1. Clock to Output Delays, Data

Set-Up and Hold Times, Clock Pulse Width

AC WAVEFORMS

*The shaded areas indicate when the input is permitted to change for predictable output performance.

D*

CP

Q

Q

1.3 V

1.3 V

1.3 V

1.3 V

1.3 V

1.3 V

1.3 V

1

1.3 V

Figure 2. Set and Clear to Output Delays,

Set and Clear Pulse Widths

1.3 V

1.3 V

1.3 V

1.3 V

1.3 V

1.3 V

1.3 V

1.3 V

SET

CLEAR

Q

Q