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K4M56323LE-MN1L Datasheet(PDF) 8 Page - Samsung semiconductor

Part # K4M56323LE-MN1L
Description  2M x 32Bit x 4 Banks Mobile SDRAM in 90FBGA
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Manufacturer  SAMSUNG [Samsung semiconductor]
Direct Link  http://www.samsung.com/Products/Semiconductor
Logo SAMSUNG - Samsung semiconductor

K4M56323LE-MN1L Datasheet(HTML) 8 Page - Samsung semiconductor

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K4M56323LE - M(E)E/N/S/C/L/R
February 2004
Mobile-SDRAM
AC CHARACTERISTICS(AC operating conditions unless otherwise noted)
NOTES :
1. Parameters depend on programmed CAS latency.
2. If clock rising time is longer than 1ns, (tr/2-0.5)ns should be added to the parameter.
3. Assumed input rise and fall time (tr & tf) = 1ns.
If tr & tf is longer than 1ns, transient time compensation should be considered,
i.e., [(tr + tf)/2-1]ns should be added to the parameter.
Parameter
Symbol
-80
-1H
-1L
Unit
Note
Min
Max
Min
Max
Min
Max
CLK cycle time
CAS latency=3
tCC
8
1000
9.5
1000
9.5
1000
ns
1
CLK cycle time
CAS latency=2
tCC
9.5
9.5
12
CLK cycle time
CAS latency=1
tCC
-
-
25
CLK to valid output delay
CAS latency=3
tSAC
6
7
7
ns
1,2
CLK to valid output delay
CAS latency=2
tSAC
7
7
8
CLK to valid output delay
CAS latency=1
tSAC
-
-
20
Output data hold time
CAS latency=3
tOH
2.5
2.5
2.5
ns
2
Output data hold time
CAS latency=2
tOH
2.5
2.5
2.5
Output data hold time
CAS latency=1
tOH
-
-
2.5
CLK high pulse width
tCH
2.5
3.0
3.0
ns
3
CLK low pulse width
tCL
2.5
3.0
3.0
ns
3
Input setup time
tSS
2.0
2.5
2.5
ns
3
Input hold time
tSH
1.0
1.5
1.5
ns
3
CLK to output in Low-Z
tSLZ
1
1
1
ns
2
CLK to output in Hi-Z
CAS latency=3
tSHZ
6
7
7
ns
CAS latency=2
7
7
8
CAS latency=1
-
-
20


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