IN74ACT652 datasheet(5/8 Pages) INTEGRAL

Part #	IN74ACT652

Description	OCTAL 3-STATE BUS TRANSCEIVERS AND D FLIP-FLOPS

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Manufacturer	INTEGRAL [Integral Corp.]

Direct Link	http://www.iksemi.com/

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IN74ACT652

5

TIMING REQUIREMENTS(CL=50pF,Input tr=tf=3.0 ns)

VCC

*

Guaranteed Limits

Symbol

Parameter

V

25

°C

-40

°C to

85

°C

Unit

tsu

Minimum Setup Time, A or B Data

Port to A-to-B Clock or B-to-A Clock

(Figure 7)

5.0

7.0

8.0

ns

th

Minimum Hold Time, A-to-B Clock or

B-to-A Clock to A or B Data Port

(Figure 7)

5.0

2.5

ns

tw

Minimum Pulse Width, A-to-B Clock or

B-to-A Clock (Figure 7)

5.0

6.0

7.0

ns

TIMING DIAGRAM

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IN74ACT652 Datasheet(PDF) 5 Page - Integral Corp.

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