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COP8TAC5CMW8 Datasheet(PDF) 1 Page - National Semiconductor (TI) |
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COP8TAC5CMW8 Datasheet(HTML) 1 Page - National Semiconductor (TI) |
1 / 54 page COP8TAB5/TAC5 8-Bit CMOS ROM Microcontroller with 2k or 4k Memory 1.0 General Description The COP8TAB5/TAC5 microcontrollers are highly integrated COP8™ Feature core devices, with 2k or 4k ROM memory and advanced features. These single-chip CMOS devices are suited for applications requiring a full featured controller with moderate memory and low EMI. Development is supported through the use of a compatible Flash based device (COP8TAB9/TAC9) which provides identical features plus In-System programmable Flash Memory and reprogrammability. The Flash device is usable in the emulation tools, and supports this device. Device included in this datasheet: Device ROM Program Memory (bytes) RAM (bytes) I/O Pins Packages Temperature COP8TAB5 2k 128 16, 24 or 40 20 and 28 SOIC WIDE, 44 LLP −40˚C to +85˚C COP8TAC5 4k 128 2.0 Features KEY FEATURES n 2k or 4k bytes ROM Program Memory n 128 bytes volatile RAM n Crystal Oscillator at 15 MHz or Integrated RC Oscillator at 10MHz n Clock Prescaler For Adjusting Power Dissipation to Processing Requirements n Power-On Reset n HALT/IDLE Power Save Modes n One 16-bit timer: — Processor Independent PWM mode — External Event counter mode — Input Capture mode n High Current I/Os —10 mA @ 0.4V OTHER FEATURES n Single supply operation: — 2.25V–2.75V n Quiet Design (low radiated emissions) n Multi-Input Wake-Up with optional interrupts n MICROWIRE/PLUS (Serial Peripheral Interface Compatible) n ACCESS.Bus Synchronous Serial Interface (compatible with I2C™ and SMBus™) — Master Mode and Slave Mode — Full Master Mode Capability — Bus Speed Up To 400KBits/Sec — Low Power Mode With Wake-Up Detection — Optional 1.8V ACCESS.Bus Compatibility n Eight multi-source vectored interrupts servicing: — External Interrupt — Idle Timer T0 — One Timers (with 2 interrupts) — MICROWIRE/PLUS Serial peripheral interface — ACCESS.Bus/I 2C/SMBus compatible Synchronous Serial Interface — Multi-Input Wake-Up — Software Trap n Idle Timer with programmable interrupt interval n 8-bit Stack Pointer SP (stack in RAM) n Two 8-bit Register Indirect Data Memory Pointers n True bit manipulation n WATCHDOG and Clock Monitor logic n Software selectable I/O options — TRI-STATE Output/High Impedance Input — Push-Pull Output — Weak Pull Up Input n Schmitt trigger inputs on I/O ports n Temperature range: –40˚C to +85˚C n Packaging: 20 and 28 SOIC and 44 LLP I2C® is a registered trademark of Phillips Corporation. SMBus is a trademark of Intel Corporation. August 2004 © 2004 National Semiconductor Corporation DS200917 www.national.com |
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