COP8TAB5 datasheet(7/54 Pages) NSC

Part #	COP8TAB5

Description	8-Bit CMOS ROM Microcontroller with 2k or 4k Memory

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Manufacturer	NSC [National Semiconductor (TI)]

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6.0 Architectural Overview

6.1 EMI REDUCTION

The COP8TAB5/TAC5 devices incorporate circuitry that

guards against electromagnetic interference - an increasing

problem in today’s microcontroller board designs. National’s

patented EMI reduction technology offers low EMI clock

circuitry, gradual turn-on output drivers (GTOs) and internal

Icc smoothing filters, to help circumvent many of the EMI

issues influencing embedded control designs. National has

achieved 15 dB–20 dB reduction in EMI transmissions when

designs have incorporated its patented EMI reducing cir-

cuitry.

6.2 ARCHITECTURE

The COP8 family is based on a modified Harvard architec-

ture, which allows data tables to be accessed directly from

program memory. This is very important with modern

microcontroller-based applications, since program memory

is usually ROM or EPROM, while data memory is usually

RAM. Consequently constant data tables need to be con-

tained in non-volatile memory, so they are not lost when the

microcontroller is powered down. In a modified Harvard ar-

chitecture, instruction fetch and memory data transfers can

be overlapped with a two stage pipeline, which allows the

next instruction to be fetched from program memory while

the current instruction is being executed using data memory.

This is not possible with a Von Neumann single-address bus

architecture.

The COP8 family supports a software stack scheme that

allows the user to incorporate many subroutine calls. This

capability is important when using High Level Languages.

With a hardware stack, the user is limited to a small fixed

number of stack levels.

6.3 INSTRUCTION SET

In today’s 8-bit microcontroller application arena cost/

performance, flexibility and time to market are several of the

key issues that system designers face in attempting to build

well-engineered products that compete in the marketplace.

Many of these issues can be addressed through the manner

in which a microcontroller’s instruction set handles process-

ing tasks. And that’s why the COP8 family offers a unique

and code-efficient instruction set - one that provides the

flexibility, functionality, reduced costs and faster time to mar-

ket that today’s microcontroller based products require.

Code efficiency is important because it enables designers to

pack more on-chip functionality into less program memory

space (ROM, OTP or ROM). Selecting a microcontroller with

less program memory size translates into lower system

costs, and the added security of knowing that more code can

be packed into the available program memory space.

6.3.1 Key Instruction Set Features

The COP8 family incorporates a unique combination of in-

struction set features, which provide designers with optimum

code efficiency and program memory utilization.

6.3.2 Single Byte/Single Cycle Code Execution

The efficiency is due to the fact that the majority of instruc-

tions are of the single byte variety, resulting in minimum

program space. Because compact code does not occupy a

substantial amount of program memory space, designers

can integrate additional features and functionality into the

microcontroller program memory space. Also, the majority

instructions executed by the device are single cycle, result-

ing in minimum program execution time. In fact, 77% of the

instructions are single byte single cycle, providing greater

code and I/O efficiency, and faster code execution.

6.3.3 Many Single-Byte, Multi-Function Instructions

The COP8 instruction set utilizes many single-byte, multi-

function instructions. This enables a single instruction to

accomplish multiple functions, such as DRSZ, DCOR, JID,

LD (Load) and X (Exchange) instructions with post-

incrementing and post-decrementing, to name just a few

examples. In many cases, the instruction set can simulta-

neously execute as many as three functions with the same

single-byte instruction.

JID: (Jump Indirect); Single byte instruction decodes exter-

nal events and jumps to corresponding service routines

(analogous to “DO CASE” statements in higher level lan-

guages).

LAID: (Load Accumulator-Indirect); Single byte look up table

instruction provides efficient data path from the program

memory to the CPU. This instruction can be used for table

lookup and to read the entire program memory for checksum

calculations.

RETSK: (Return Skip); Single byte instruction allows return

from subroutine and skips next instruction. Decision to

branch can be made in the subroutine itself, saving code.

AUTOINC/DEC: (Auto-Increment/Auto-Decrement); These

instructions use the two memory pointers B and X to effi-

ciently process a block of data (simplifying “FOR NEXT” or

other loop structures in higher level languages).

6.3.4 Bit-Level Control

Bit-level control over many of the microcontroller’s I/O ports

provides a flexible means to ease layout concerns and save

board space. All members of the COP8 family provide the

ability to set, reset and test any individual bit in the data

memory address space, including memory-mapped I/O ports

and associated registers.

6.3.5 Register Set

Three memory-mapped pointers handle register indirect ad-

dressing and software stack pointer functions. The memory

data pointers allow the option of post-incrementing or post-

decrementing with the data movement instructions (LOAD/

EXCHANGE). And 15 memory-mapped registers allow de-

signers to optimize the precise implementation of certain

specific instructions.

6.4 PACKAGING/PIN EFFICIENCY

Real estate and board configuration considerations demand

maximum space and pin efficiency, particularly given today’s

high integration and small product form factors. Microcon-

troller users try to avoid using large packages to get the I/O

needed. Large packages take valuable board space and

increase device cost, two trade-offs that microcontroller de-

signs can ill afford.

The COP8 family offers a wide range of packages and does

not waste pins.

www.national.com

7

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COP8TAB5 Datasheet(PDF) 7 Page - National Semiconductor (TI)

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