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CP3CN17 Datasheet(PDF) 1 Page - National Semiconductor (TI) |
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CP3CN17 Datasheet(HTML) 1 Page - National Semiconductor (TI) |
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1 / 220 page  ©2005 National Semiconductor Corporation www.national.com FINAL APRIL 2005 CP3CN17 Reprogrammable Connectivity Processor with CAN Interface 1.0 General Description The CP3CN17 connectivity processor combines a powerful RISC core with on-chip SRAM and Flash memory for high computing bandwidth, hardware communications peripher- als for high I/O bandwidth, and an external bus for system expandability. On-chip communications peripherals include: CAN control- ler, ACCESS.bus, Microwire/Plus, SPI, UART, and Ad- vanced Audio Interface (AAI). Additional on-chip peripherals include DMA controller, CVSD/PCM conversion module, Timing and Watchdog Unit, Versatile Timer Unit, Multi- Function Timer, and Multi-Input Wakeup. The CP3CN17 is backed up by the software resources de- signers need for rapid time-to-market, including an operat- ing system, peripheral drivers, reference designs, and an integrated development environment. National Semiconductor offers a complete and industry- proven application development environment for CP3CN17 applications, including the IAR Embedded Workbench, iSYSTEM winIDEA and iC3000 Active Emulator, Develop- ment Board, and Application Software. Block Diagram CPU Core Bus 12 MHz and 32 kHz Oscillator Peripheral Bus PLL and Clock Generator Power-on-Reset 256K Bytes Flash Program Memory 8K Bytes Flash Data Bus Interface Unit Peripheral Bus Controller 10K Bytes Static RAM Serial Debug Interface CAN CR16C CPU Core DMA Controller Interrupt Control Unit CVSD/PCM Power Manage- ment Timing and Watchdog Unit ACCESS .bus Versatile Timer Unit Muti-Func- tion Timer Multi-Input Wake-Up GPIO Audio Interface Microwire/ SPI UART Clock Generator DS138 TRI-STATE is a registered trademark of National Semiconductor Corporation. |
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