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ALD1701APA Datasheet(PDF) 4 Page - Advanced Linear Devices

Part # ALD1701APA
Description  MICROPOWER RAIL-TO-RAIL CMOS OPERATIONAL AMPLIFIER
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Manufacturer  ALD [Advanced Linear Devices]
Direct Link  http://www.aldinc.com
Logo ALD - Advanced Linear Devices

ALD1701APA Datasheet(HTML) 4 Page - Advanced Linear Devices

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ALD1701A/ALD1701B
Advanced Linear Devices
4
ALD1701/ALD1701G
Design & Operating Notes:
1. The ALD1701 CMOS operational amplifier uses a 3 gain stage
architecture and an improved frequency compensation scheme to
achieve large voltage gain, high output driving capability, and better
frequency stability. In a conventional CMOS operational amplifier
design, compensation is achieved with a pole splitting capacitor
together with a nulling resistor. This method is, however, very bias
dependent and thus cannot accommodate the large range of supply
voltage operation as is required from a stand alone CMOS opera-
tional amplifier. The ALD1701 is internally compensated for unity
gain stability using a novel scheme that does not use a nulling
resistor. This scheme produces a clean single pole roll off in the gain
characteristics while providing for more than 70 degrees of phase
margin at the unity gain frequency.
2. The ALD1701 has complementary p-channel and n-channel input
differential stages connected in parallel to accomplish rail to rail input
common mode voltage range. This means that with the ranges of
common mode input voltage close to the power supplies, one of the
two differential stages is switched off internally. To maintain compa-
tibility with other operational amplifiers, this switching point has been
selected to be about 1.5V below the positive supply voltage. Since
offset voltage trimming on the ALD1701 is made when the input
voltage is symmetrical to the supply voltages, this internal switching
does not affect a large variety of applications such as an inverting
amplifier or non-inverting amplifier with a gain larger than 2.5 (5V
operation), where the common mode voltage does not make excur-
sions above this switching point. The user should however, be
aware that this switching does take place if the operational amplifier
is connected as a unity gain buffer, and should make provision in his
design to allow for input offset voltage variations.
3. The input bias and offset currents are essentially input protection
diode reverse bias leakage currents, and are typically less than 1pA
at room temperature. This low input bias current assures that the
analog signal from the source will not be distorted by input bias
currents. Normally, this extremely high input impedance of greater
than 1012
Ω would not be a problem as the source impedance would
limit the node impedance. However, for applications where source
impedance is very high, it may be necessary to limit noise and hum
pickup through proper shielding.
4. The output stage consists of class AB complementary output drivers,
capable of driving a low resistance load. The output voltage swing
is limited by the drain to source on-resistance of the output transis-
tors as determined by the bias circuitry, and the value of the load
resistor. When connected in the voltage follower configuration, the
oscillation resistant feature, combined with the rail to rail input and
output feature, makes an effective analog signal buffer for medium
to high source impedance sensors, transducers, and other circuit
networks.
5. The ALD1701 operational amplifier has been designed to provide full
static discharge protection. Internally, the design has been carefully
implemented to minimize latch up. However, care must be exercised
when handling the device to avoid strong static fields that may
degrade a diode junction, causing increased input leakage currents.
In using the operational amplifier, the user is advised to power up the
circuit before, or simultaneously with any input voltages applied, and
to limit input voltages not to exceed 0.3V of the power supply voltage
levels.
6. The ALD1701, with its micropower operation, offers numerous
benefits in reduced power supply requirements, less noise coupling
and current spikes, less thermally induced drift, better overall reli-
ability due to lower self heating, and lower input bias current. It
requires practically no warm up time as the chip junction heats up to
only 0.1
°C above ambient temperature under most operating condi-
tions.
TYPICAL PERFORMANCE CHARACTERISTICS
INPUT BIAS CURRENT AS A FUNCTION
OF AMBIENT TEMPERATURE
AMBIENT TEMPERATURE (
°C)
1000
100
10
0.1
1.0
100
-25
0
75
125
50
25
-50
10000
VS = ±2.5V
COMMON MODE INPUT VOLTAGE RANGE
AS A FUNCTION OF SUPPLY VOLTAGE
SUPPLY VOLTAGE (V)
±7
±6
±5
±4
±3
±2
±1
0
0
±1
±2
±3
±4
±5
±6
±7
TA = 25°C
SUPPLY CURRENT AS A FUNCTION
OF SUPPLY VOLTAGE
SUPPLY VOLTAGE (V)
±500
±400
±200
±300
0
±100
0
±1
±2
±3
±4
±5
±6
TA = -55°C
-25
°C
+25
°C
+70
°C
+125
°C
INPUTS GROUNDED
OUTPUT UNLOADED
OPEN LOOP VOLTAGE GAIN AS A
FUNCTION OF LOAD RESISTANCE
10M
LOAD RESISTANCE (
Ω)
10K
100K
1M
1000
100
10
1
VS = ±2.5V
TA = 25°C


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