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UPD70F3217GJ-UEN Datasheet(PDF) 10 Page - NEC

Part # UPD70F3217GJ-UEN
Description  32-Bit Single-Chip Microcontrollers
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Manufacturer  NEC [NEC]
Direct Link  http://www.nec.com/
Logo NEC - NEC

UPD70F3217GJ-UEN Datasheet(HTML) 10 Page - NEC

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User’s Manual U16889EJ1V0UD
10
4.3.8
Port 8 ........................................................................................................................................... 118
4.3.9
Port 9 ........................................................................................................................................... 121
4.3.10
Port CD ........................................................................................................................................ 129
4.3.11
Port CM........................................................................................................................................ 130
4.3.12
Port CS ........................................................................................................................................ 132
4.3.13
Port CT ........................................................................................................................................ 134
4.3.14
Port DH ........................................................................................................................................ 136
4.3.15
Port DL......................................................................................................................................... 138
4.4
Block Diagrams ........................................................................................................................ 141
4.5
Port Register Setting When Alternate Function Is Used...................................................... 170
4.6
Cautions .................................................................................................................................... 178
4.6.1
Cautions on bit manipulation instruction for port n register (Pn) .................................................. 178
4.6.2
Hysteresis characteristics ............................................................................................................ 179
CHAPTER 5 BUS CONTROL FUNCTION .......................................................................................... 180
5.1
Features .................................................................................................................................... 180
5.2
Bus Control Pins ...................................................................................................................... 181
5.2.1
Pin status when internal ROM, internal RAM, or on-chip peripheral I/O is accessed................... 182
5.2.2
Pin status in each operation mode............................................................................................... 182
5.3
Memory Block Function .......................................................................................................... 183
5.3.1
Chip select control function.......................................................................................................... 184
5.4
External Bus Interface Mode Control Function..................................................................... 184
5.5
Bus Access ............................................................................................................................... 185
5.5.1
Number of clocks for access........................................................................................................ 185
5.5.2
Bus size setting function .............................................................................................................. 185
5.5.3
Access by bus size ...................................................................................................................... 186
5.6
Wait Function............................................................................................................................ 193
5.6.1
Programmable wait function ........................................................................................................ 193
5.6.2
External wait function................................................................................................................... 194
5.6.3
Relationship between programmable wait and external wait ....................................................... 195
5.6.4
Programmable address wait function........................................................................................... 196
5.7
Idle State Insertion Function................................................................................................... 197
5.8
Bus Hold Function ................................................................................................................... 198
5.8.1
Functional outline......................................................................................................................... 198
5.8.2
Bus hold procedure...................................................................................................................... 199
5.8.3
Operation in power save mode .................................................................................................... 199
5.9
Bus Priority ............................................................................................................................... 200
5.10
Bus Timing................................................................................................................................ 201
5.11
Cautions .................................................................................................................................... 207
CHAPTER 6 CLOCK GENERATION FUNCTION............................................................................... 208
6.1
Overview ................................................................................................................................... 208
6.2
Configuration............................................................................................................................ 209
6.3
Registers ................................................................................................................................... 211
6.4
Operation .................................................................................................................................. 215
6.4.1
Operation of each clock ............................................................................................................... 215
6.4.2
Clock output function ................................................................................................................... 215


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