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UPD78F0034AYGB-8EU Datasheet(PDF) 8 Page - NEC |
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UPD78F0034AYGB-8EU Datasheet(HTML) 8 Page - NEC |
8 / 66 page µPD78F0034A, 78F0034AY 8 Data Sheet U14040EJ4V0DS • 64-pin plastic LQFP (10 × 10) • 64-pin plastic QFP (14 × 14) µPD78F0034AGB-8EU, 78F0034AYGB-8EU µPD78F0034AGC-AB8, 78F0034AYGC-AB8 • 64-pin plastic LQFP (14 × 14) • 64-pin plastic TQFP (12 × 12) µPD78F0034AGC-8BS, 78F0034AYGC-8BS µPD78F0034AGK-9ET, 78F0034AYGK-9ET Notes 1. SDA0 and SCL0 are incorporated only in the µPD78F0034AY Subseries. 2. SI31, SO31, and SCK31 are incorporated only in the µPD78F0034A Subseries. Cautions 1. Connect the VPP pin directly to VSS0 or VSS1 in normal operation mode. 2. Connect the AVSS pin to VSS0. Remark When the µPD78F0034A and 78F0034AY are used in application fields that require reduction of the noise generated from inside the microcontroller, the implementation of noise reduction measures, such as supplying voltage to VDD0 and VDD1 individually and connecting VSS0 and VSS1 to different ground lines, is recommended. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 P50/A8 P51/A9 P52/A10 P53/A11 P54/A12 P55/A13 P56/A14 P57/A15 VSS0 VDD0 P30 P31 P32/SDA0Note 1 P33/SCL0Note 1 P34/SI31Note 2 P35/SO31Note 2 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 P71/TI01 P70/TI00/TO0 P03/INTP3/ADTRG P02/INTP2 P01/INTP1 P00/INTP0 VSS1 X1 X2 VPP XT1 XT2 RESET AVDD AVREF P10/ANI0 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 |
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