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T81L0003A-BD Datasheet(PDF) 9 Page - Taiwan Memory Technology

Part # T81L0003A-BD
Description  Reduced I/O 8-bit MCU
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Manufacturer  TMT [Taiwan Memory Technology]
Direct Link  http://www.tmtech.com.tw
Logo TMT - Taiwan Memory Technology

T81L0003A-BD Datasheet(HTML) 9 Page - Taiwan Memory Technology

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TE
CH
tm
T81L0003A
TM Technology, Inc. reserves the right
P. 9
Publication Date: SEP. 2004
to change products or specifications without notice.
Revision: C
Special Function Register SCON, while the stop bit is ignored. The baud rate is programmable to either 1/32 or 1/64 the
oscillator frequency.
Mode 3: 11 bits are transmitted (through TxD) or received (through RxD): a start bit (0), 8 data bits (LSB first), a
programmable 9th data bit, and a stop bit (1). In fact, Mode 3 is the same as Mode 2 in all respects except baud rate. The
baud rate in Mode 3 is variable. In all four modes, transmission is initiated by any instruction that uses SBUF as a
destination register. Reception is initiated in Mode 0 by the condition RI = ‘0’ and REN = ‘1’. Reception is initiated in the
other
modes by the incoming start bit if REN = ‘1’.
Multiprocessor Communications
Modes 2 and 3 have a special provision for multiprocessor communications. In these modes, 9 data bits are received.
The 9
th one goes into RB8. Then comes a stop bit. The port can be programmed such that when the stop bit is received, the
serial port interrupt will be activated only if RB8 = ‘1’. This feature is enabled by setting bit SM2 in SCON. A way to use
this feature in multiprocessor systems is as follows: When the master processor wants to transmit a block of data to one of
several slaves, it first sends out an address byte which identifies the target slave. An address byte differs from a data byte in
that the 9th bit is ‘1’ in an address byte and ‘0’ in a data byte. With SM2 = ‘1’, no slave will be interrupted by a data byte.
An address byte, however, will interrupt all slaves, so that each slave can examine the received byte and see if it is being
addressed. The addressed slave will clear its SM2 bit and prepare to receive the data bytes that will be coming. The slaves
that weren’t being addressed leave their SM2s set and go on about their business, ignoring the coming data bytes.
SM2 has no effect in Mode 0, in Mode 1 can be used to check the validity of the stop bit. In Mode 1 reception, if
SM2 = ‘1’, the receive interrupt will not active unless a valid stop bit is received.
Serial Port Control Register
The serial port control and status register is the Special Function Register SCON. This register contains not only the
mode selection bits, but also the 9th data bit for transmit and receive (TB8 and RB8), and the serial port interrupt bits (TI
and RI).
Baud Rates
The baud rate in Mode 0 is fixed: Mode 0 Baud Rate = Oscillator Frequency / 12. The baud rate in Mode 2 depends
on the value of bit SMOD in Special Function Register PCON. If SMOD = ‘0’ (which is the value on reset), the baud rate
is 1/64 the oscillator frequency. If SMOD = ‘1’, the baud rate is 1/32 the oscillator frequency.
Mode 2 Baud Rate =2
SMOD/64* (Oscillator Frequency)
In the 80C52, the baud rates in Modes 1 and 3 are determined by the Timer 1 overflow rate.
SCON
MSB
LSB
SM0
SM1
SM2
REN
TB8
RB8
TI
RI


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