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PI1004-1-QAHG Datasheet(PDF) 7 Page - Vicor Corporation |
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PI1004-1-QAHG Datasheet(HTML) 7 Page - Vicor Corporation |
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7 / 16 page  Picor Corporation • picorpower.com PI1004 Data Sheet Rev. 2.5 Page 7 of 16 Applications Description becomes the control reference. The amplifier EAIN inverting input and the EAO output pin can be configured as a unity gain follower or as an inverting amplifier with the proper feedback components to set the close loop gain and frequency response of the voltage control loop. Differential sensing is accomplished by referencing the entire PI1004 to the negative return of the load (typically CPUVSS). The SGND pin serves a dual purpose of returning the PI1004 VCC current and sensing the low side of the load. The internal reference "rides" on SGND to compensate for voltage changes at the load. Special care must be taken in the layout to avoid noise pick-up or offsets due to ground loop currents. Fault Circuitry There are three input conditions that will set the fault latch determined by ENABLE, VIDOFF or UVLO states as shown in Table 2. Any fault will clamp the non-inverting error amp input (EAIP) and SS pin to SGND. The fault latch is reset when the SS pin drops below 0.25 V AND all faults are cleared at the Set dominant latch input. Power Good and Over-Voltage Protection The PWRGD and OVP (OVP in PI1004-2 only) pins provide output signals when the output voltage exceeds internally set thresholds. The inputs to the PWRGD and OVP comparators are referenced to REFIN and VO. The PWRGD and OVP signals are outputs for system use and do not trigger an internal fault. Programmable VID Offset REFOUT is set to the VR10 maximum output voltage according to Table 1. For PI1004-1, the no-load VID output voltage can be reduced to accommodate various load line tolerance bands with the OFFSET function. Once the value of RAVP has been chosen for the desired load line, ROFFSET can be selected for the required no-load offset. Refer to Figure 4d to determine resistor values setting the AVP and Offset parameters. Figures 5-10 demonstrate some of the dynamic performance of these functions such as AVP response time, REFOUT response to VID change, VID blanking interval, error amplifier unity gain slew rate and soft-start response to stepped Vcc in that order. Figures 11-14 demonstrate typical DAC error performance at specific temperatures and Figure 15 demonstrates the VID performance from -55 to 125 degrees Celsius at VID=1.2V. The PI1004 products were developed to enable Vicor’s FPA (Factorized Power Architecture) to meet Intel’s requirements defined in VRM/VRD 10.X specifications. A simplified schematic representation of this topology is shown in Figure 4a. DC Performance data of this configuration using the PI1004-1 is shown in Figures 16-17 and dynamic performance is shown in Figures 18a-g, 19a-b and 20. In addition to FPA applications, independent functions of the PI1004 can be used in different combinations as building blocks in control applications. The PI-1004 can be used as a VID controlled reference in an embedded power converter circuit. The PI1004 error amp can be configured as a unity gain buffer to provide the VRD capable reference to the non-inverting input to the control amp. If AVP is required, a method for sensing the load current would need to be implemented. In isolated applications as shown in Figure 4b, the reference and error amplifier might replace a TL431 (Vcc power is required for the PI1004) while the PWRGD, OVP and AVP blocks replace a quad comparator. The PI1004 is a candidate for any application that uses a reference and several amplifiers or comparators especially where digital or hard-wire setting of voltages can be accommodated. The IC can be used as a programmable reference control for a converter or power supply with a positive reference based trim configuration as shown in Figure 4c. For these applications a programmable output voltage and over- voltage features can be created using the error amp as a buffer creating a VR10 reference for the SC/trim input of the converter. Care must be taken not to exceed the amplifier output sink and source current capabilities and to be compatible with the converter reference pin. The AVP block of circuits can be used to create two independent voltage to current converters providing a sink current that is the sum of the two at the IAVP pin. Again consideration of the specified range for these functions is required. Finally the Power Good block can be used as basic comparators for voltage monitoring with the addition of an independent output on the OVP pin in the PI1004-2 An additional bit of resolution can be added to the DAC by using the circuit shown in Figure 4d with proper sequencing by the microprocessor 6.25 mV increments are possible. |
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