RC8660 VOICE SYNTHESIZER
RC SYSTEMS
Pin Name
Type
Name and Function
IC0–IC32
INTPUT/
OUTPUT
CHIPSET INTERCONNECTS: Interconnections between the RC8660 and RC46xx chips. IC0 connects to
IC0, IC1 to IC1, etc. IC30–IC32 must have a 47 kΩ–100 kΩ pullup resistor to VCC. No other connections should
be made to these pins.
AO0
AO1
OUTPUT
ANALOG OUTPUT: Channels 0 and 1 digital to analog (D/A) converter outputs. The output voltage range is
from 0 V to AVREF. AO1 is reserved for future use.
TS0
TS1
OUTPUT
TALK STATUS: Indicates whether a voice channel is active. TSn can be used to enable external devices such as
a transmitter, telephone, or audio amplifier. The pins’ polarity are programmable, and can be activated automati-
cally or under program control. TS1 is reserved for future use.
SUSP0#
SUSP1#
INPUT
SUSPEND: Suspends audio output when Low, allowing playback to be paused. When High, playback resumes
at the point output was suspended. These pins affect only the corresponding AO pin; they do not affect the digital
audio DAOUT pin (use DARTS# to control DAOUT). During recording operations, SUSP0# will suspend record-
ing when Low. SUSP1# is reserved for future use. Connect these pins to a High level if not used.
AS0
AS1
OUTPUT
AUDIO SYNC: Outputs a clock signal in synchronization with the updating of analog outputs AO0 and AO1.
The pin changes state whenever the corresponding D/A converter is updated. During recording, AS0 changes
state each time the A/D converter input is sampled. AS1 is reserved for future use.
DAOUT
OUTPUT
DIGITAL AUDIO OUTPUT: Provides the same 8 bit digital audio stream that is fed to the internal D/A
converters. This pin can be programmed to be a CMOS or open-drain output. The communication protocol is
progammable, and can operate in synchronous or asynchronous mode.
DACLK
INPUT
DIGITAL AUDIO CLOCK: This pin is used to clock data out of the DAOUT pin and data into the DAIN pin in
the synchronous digital audio output mode. DACLK can be programmed to transfer data on either the rising edge
or falling edge of the clock. Connect this pin to a High level if not used.
DAIN
INPUT
DIGITAL AUDIO CONTROL INPUT: This pin is used to control the operation of the DAOUT pin in a multi-
channel system. Reserved for a future product; connect this pin to a High level.
DARTS#
INPUT
DIGITAL AUDIO REQUEST TO SEND: A Low on this pin enables transmission from the DAOUT pin; a
High suspends transmission. DARTS# may be used in both the synchronous and asynchronous transfer modes.
Connect this pin to a Low level if not used.
PIO0–PIO7
INPUT/
OUTPUT
PERIPHERAL INPUT/OUTPUT BUS: Eight bit bidirectional peripheral bus. Data is input from a peripheral
when PRD# is active. Status information is output when STS# is active. PIO0–PIO7 also connect to the RC46xx
chip. Text, data and commands can be sent to the RC8660 over this bus.
STS#
OUTPUT
STATUS: Controls the transfer of status information from the RC8660 to a peripheral. Status information is
driven on the PIO0–PIO7 pins when STS# is Low. STS# is active only when there is new status information.
PRD#
OUTPUT
PERIPHERAL READ: Controls the transfer of data from a peripheral to the RC8660. Data is read from the
PIO0–PIO7 pins when PRD# is Low.
PWR#
INPUT
PERIPHERAL WRITE: Controls the writing of peripheral data to the RC8660. Data on the PIO0–PIO7 pins is
latched in the RC8660 on the rising edge of PWR#. Sufficient time must be given for the RC8660 to process the
data before writing additional data—RDY# or Status Register bit SR.4 should be used for this purpose. Connect
this pin to a High level if not used.
RDY#
OUTPUT
READY: RDY# High indicates that the RC8660 is busy processing the last byte that was written over the Pe-
ripheral I/O Bus. Wait for RDY# to be Low before attempting to write more data. RDY# goes High briefly after
each write operation over the PIO0–PIO7 bus, acknowledging receipt of each byte. If the RC8660’s input buffer
becomes full as a result of the last write operation, RDY# will remain High until room becomes available. Note
that RDY# can also be read from Status Register bit SR.4.
AN0–AN3
INPUT
A/D CONVERTER INPUTS: Analog to digital converter input pins. Analog signals sampled on these pins can
be read through the serial interface, or stored in recording memory. Leave any unused pins unconnected.
ADTRG
INPUT
A/D CONVERTER TRIGGER: Starts A/D conversion when hardware triggering is selected. Minimum Low
pulse width is 200 ns. Leave this pin unconnected if not used.
pin DeSCRipTiOnS
Table 1.1. pin Descriptions